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author | Gabe Black <gblack@eecs.umich.edu> | 2007-05-09 20:50:46 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-05-09 20:50:46 -0700 |
commit | 4ad1b58fdd7cc9ba9704ae966a41c99fd0f1dbc9 (patch) | |
tree | 2c68db7cd94a457fff83fe8d4bd7c63a6de023c0 /src/arch/sparc/isa/formats | |
parent | 939cbd8201a4b0dfad6a56b5d9fb68cc2b23ae73 (diff) | |
parent | c2ac0fd89b9928f653e1485b2432cd71b455d7c5 (diff) | |
download | gem5-4ad1b58fdd7cc9ba9704ae966a41c99fd0f1dbc9.tar.xz |
Merge zizzer.eecs.umich.edu:/bk/newmem
into doughnut.mwconnections.com:/home/gblack/newmem-o3-micro
--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
Diffstat (limited to 'src/arch/sparc/isa/formats')
-rw-r--r-- | src/arch/sparc/isa/formats/mem/basicmem.isa | 6 | ||||
-rw-r--r-- | src/arch/sparc/isa/formats/mem/blockmem.isa | 6 | ||||
-rw-r--r-- | src/arch/sparc/isa/formats/mem/swap.isa | 8 | ||||
-rw-r--r-- | src/arch/sparc/isa/formats/mem/util.isa | 12 |
4 files changed, 25 insertions, 7 deletions
diff --git a/src/arch/sparc/isa/formats/mem/basicmem.isa b/src/arch/sparc/isa/formats/mem/basicmem.isa index 2f62c7bef..aa6c4cdea 100644 --- a/src/arch/sparc/isa/formats/mem/basicmem.isa +++ b/src/arch/sparc/isa/formats/mem/basicmem.isa @@ -57,10 +57,12 @@ let {{ addrCalcImm = 'EA = Rs1 + imm;' iop = InstObjParams(name, Name, 'Mem', {"code": code, "postacc_code" : postacc_code, - "fault_check": faultCode, "ea_code": addrCalcReg}, opt_flags) + "fault_check": faultCode, "ea_code": addrCalcReg, + "EA_trunc": TruncateEA}, opt_flags) iop_imm = InstObjParams(name, Name + "Imm", 'MemImm', {"code": code, "postacc_code" : postacc_code, - "fault_check": faultCode, "ea_code": addrCalcImm}, opt_flags) + "fault_check": faultCode, "ea_code": addrCalcImm, + "EA_trunc": TruncateEA}, opt_flags) header_output = MemDeclare.subst(iop) + MemDeclare.subst(iop_imm) decoder_output = BasicConstructor.subst(iop) + BasicConstructor.subst(iop_imm) decode_block = ROrImmDecode.subst(iop) diff --git a/src/arch/sparc/isa/formats/mem/blockmem.isa b/src/arch/sparc/isa/formats/mem/blockmem.isa index e19016bd0..ea74ef179 100644 --- a/src/arch/sparc/isa/formats/mem/blockmem.isa +++ b/src/arch/sparc/isa/formats/mem/blockmem.isa @@ -298,11 +298,13 @@ let {{ iop = InstObjParams(name, Name, 'BlockMem', {"code": pcedCode, "ea_code": addrCalcReg, "fault_check": faultCode, "micro_pc": microPc, - "set_flags": flag_code}, opt_flags) + "set_flags": flag_code, "EA_trunc" : TruncateEA}, + opt_flags) iop_imm = InstObjParams(name, Name + 'Imm', 'BlockMemImm', {"code": pcedCode, "ea_code": addrCalcImm, "fault_check": faultCode, "micro_pc": microPc, - "set_flags": flag_code}, opt_flags) + "set_flags": flag_code, "EA_trunc" : TruncateEA}, + opt_flags) decoder_output += BlockMemMicroConstructor.subst(iop) decoder_output += BlockMemMicroConstructor.subst(iop_imm) exec_output += doDualSplitExecute( diff --git a/src/arch/sparc/isa/formats/mem/swap.isa b/src/arch/sparc/isa/formats/mem/swap.isa index f3d15670f..dde327f5c 100644 --- a/src/arch/sparc/isa/formats/mem/swap.isa +++ b/src/arch/sparc/isa/formats/mem/swap.isa @@ -51,6 +51,7 @@ def template SwapExecute {{ } if(storeCond && fault == NoFault) { + %(EA_trunc)s fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, %(asi_val)s, &mem_data); } @@ -91,6 +92,7 @@ def template SwapInitiateAcc {{ } if(fault == NoFault) { + %(EA_trunc)s fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, %(asi_val)s, &mem_data); } @@ -157,12 +159,14 @@ let {{ addrCalcReg = 'EA = Rs1;' iop = InstObjParams(name, Name, 'Mem', {"code": code, "postacc_code" : postacc_code, - "fault_check": faultCode, "ea_code": addrCalcReg}, opt_flags) + "fault_check": faultCode, "ea_code": addrCalcReg, + "EA_trunc" : TruncateEA}, opt_flags) header_output = MemDeclare.subst(iop) decoder_output = BasicConstructor.subst(iop) decode_block = BasicDecode.subst(iop) microParams = {"code": code, "postacc_code" : postacc_code, - "ea_code" : addrCalcReg, "fault_check" : faultCode} + "ea_code" : addrCalcReg, "fault_check" : faultCode, + "EA_trunc" : TruncateEA} exec_output = doSplitExecute(execute, name, Name, asi, ["IsStoreConditional"], microParams); return (header_output, decoder_output, exec_output, decode_block) diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa index dfe937371..38cde9a50 100644 --- a/src/arch/sparc/isa/formats/mem/util.isa +++ b/src/arch/sparc/isa/formats/mem/util.isa @@ -149,6 +149,7 @@ def template LoadExecute {{ %(fault_check)s; if(fault == NoFault) { + %(EA_trunc)s fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s); } if(fault == NoFault) @@ -179,6 +180,7 @@ def template LoadInitiateAcc {{ %(fault_check)s; if(fault == NoFault) { + %(EA_trunc)s fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s); } return fault; @@ -224,6 +226,7 @@ def template StoreExecute {{ } if(storeCond && fault == NoFault) { + %(EA_trunc)s fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem, EA, %(asi_val)s, 0); } @@ -257,6 +260,7 @@ def template StoreInitiateAcc {{ } if(storeCond && fault == NoFault) { + %(EA_trunc)s fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem, EA, %(asi_val)s, 0); } @@ -317,6 +321,11 @@ let {{ fault = new PrivilegedAction; ''' + TruncateEA = ''' +#if !FULL_SYSTEM + EA = Pstate<3:> ? EA<31:0> : EA; +#endif + ''' }}; //A simple function to generate the name of the macro op of a certain @@ -346,7 +355,8 @@ let {{ (eaRegCode, nameReg, NameReg), (eaImmCode, nameImm, NameImm)): microParams = {"code": code, "postacc_code" : postacc_code, - "ea_code": eaCode, "fault_check": faultCode} + "ea_code": eaCode, "fault_check": faultCode, + "EA_trunc" : TruncateEA} executeCode += doSplitExecute(execute, name, Name, asi, opt_flags, microParams) return executeCode |