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authorGabe Black <gblack@eecs.umich.edu>2007-01-03 00:52:30 -0500
committerGabe Black <gblack@eecs.umich.edu>2007-01-03 00:52:30 -0500
commit8840ebcb00f3988c781063e572b6df5742968f95 (patch)
treee9711f561dff45b31489a7fb539ed98660e26d0e /src/arch/sparc/isa/formats
parenta0e8aa6737f534a8e51d866728dd6dc59bef263d (diff)
parent7d7f3d0e99eca98a5659e73bce56d615f0ed4fc3 (diff)
downloadgem5-8840ebcb00f3988c781063e572b6df5742968f95.tar.xz
Merge zizzer:/bk/newmem
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : f4a05accb8fa24d425dd818b1b7f268378180e99
Diffstat (limited to 'src/arch/sparc/isa/formats')
-rw-r--r--src/arch/sparc/isa/formats/mem/blockmem.isa4
-rw-r--r--src/arch/sparc/isa/formats/mem/util.isa6
2 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/sparc/isa/formats/mem/blockmem.isa b/src/arch/sparc/isa/formats/mem/blockmem.isa
index c4f052f98..62ac4b43a 100644
--- a/src/arch/sparc/isa/formats/mem/blockmem.isa
+++ b/src/arch/sparc/isa/formats/mem/blockmem.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -101,7 +101,7 @@ output header {{
// We make the assumption that all block memory operations
// Will take 8 instructions to execute
TwinMem(const char *mnem, ExtMachInst _machInst) :
- SparcMacroInst(mnem, _machInst, No_OpClass, 8)
+ SparcMacroInst(mnem, _machInst, No_OpClass, 2)
{}
};
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index c56821c4f..5bb4e1fe6 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -295,9 +295,9 @@ let {{
fault = new MemAddressNotAligned;
'''
TwinAlignmentFaultCheck = '''
- if(RD & 0xe)
+ if(RD & 0x1)
fault = new IllegalInstruction;
- else if(EA & 0x1f)
+ else if(EA & 0xf)
fault = new MemAddressNotAligned;
'''
# XXX Need to take care of pstate.hpriv as well. The lower ASIs