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| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-02-02 18:04:42 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-02-02 18:04:42 -0500 |
| commit | 592f35ac0ff8d525fad2dc606b53b4cd8b84fd69 (patch) | |
| tree | cdd2cf069de41c1f1fbf58a567dd5d855dce769c /src/arch/sparc/isa/includes.isa | |
| parent | 5c7192daedcd33d9f7deb42406002adf4f2ffb68 (diff) | |
| download | gem5-592f35ac0ff8d525fad2dc606b53b4cd8b84fd69.tar.xz | |
fix mostly floating point related
src/arch/sparc/floatregfile.cc:
fix fp read/writing to registers... looking for suggestions on cleaner ways if anyone has them
src/arch/sparc/isa/decoder.isa:
fix some fp implementations
src/arch/sparc/isa/formats/basic.isa:
add new fp op class that 0 cexec in fsr and sets rounding mode for the up comming op
src/arch/sparc/isa/includes.isa:
include the appropriate header files for the rounding code
src/arch/sparc/miscregfile.cc:
print fsr out when it's read/written and the Sparc traceflgas in on
src/cpu/exetrace.cc:
fix printing of float registers
--HG--
extra : convert_revision : 49faab27f2e786a8455f9ca0f3f0132380c9d992
Diffstat (limited to 'src/arch/sparc/isa/includes.isa')
| -rw-r--r-- | src/arch/sparc/isa/includes.isa | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa index a6dca9bf1..d2ef67154 100644 --- a/src/arch/sparc/isa/includes.isa +++ b/src/arch/sparc/isa/includes.isa @@ -53,7 +53,7 @@ output decoder {{ #include "cpu/thread_context.hh" // for Jump::branchTarget() #include "mem/packet.hh" -#if defined(linux) +#if defined(linux) || defined(__APPLE__) #include <fenv.h> #endif #include <algorithm> @@ -62,9 +62,14 @@ using namespace SparcISA; }}; output exec {{ -#if defined(linux) +#if defined(linux) || defined(__APPLE__) #include <fenv.h> #endif + +#if defined(__sun) || defined (__OpenBSD__) +#include <ieeefp.h> +#endif + #include <limits> #include <cmath> |