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author | Gabe Black <gblack@eecs.umich.edu> | 2006-08-11 20:22:36 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-08-11 20:22:36 -0400 |
commit | e6842652ba14a545d08286d23c43aa0f379314f8 (patch) | |
tree | c99b2778bf89dfdd335501d606b9c8bee0156b3d /src/arch/sparc/isa | |
parent | ec26f0bb3d3d0af9dc87e5e3f25c2b90f2db0332 (diff) | |
download | gem5-e6842652ba14a545d08286d23c43aa0f379314f8.tar.xz |
Adjusted the decoder a little.
--HG--
extra : convert_revision : 5bdbe00342837ae4caacb3ad86c7becca36ba6ce
Diffstat (limited to 'src/arch/sparc/isa')
-rw-r--r-- | src/arch/sparc/isa/decoder.isa | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 6173a36dd..0c2729833 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -117,15 +117,15 @@ decode OP default Unknown::unknown() 0x2: decode OP3 { format IntOp { 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); - 0x01: and({{Rd = Rs1.udw & Rs2_or_imm13;}}); - 0x02: or({{Rd = Rs1.udw | Rs2_or_imm13;}}); - 0x03: xor({{Rd = Rs1.udw ^ Rs2_or_imm13;}}); + 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); + 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); + 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); - 0x05: andn({{Rd = Rs1.udw & ~Rs2_or_imm13;}}); - 0x06: orn({{Rd = Rs1.udw | ~Rs2_or_imm13;}}); - 0x07: xnor({{Rd = ~(Rs1.udw ^ Rs2_or_imm13);}}); + 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); + 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); + 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); - 0x09: mulx({{Rd = Rs1 * Rs2_or_imm13;}}); + 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 0x0A: umul({{ Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; Y = Rd<63:32>; |