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authorAli Saidi <saidi@eecs.umich.edu>2007-02-22 01:11:04 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-02-22 01:11:04 -0500
commit63fef6b011fc2684a9ef04543c422a442df99932 (patch)
tree120f8abfdb960da76a0503f1fedd523407f3845d /src/arch/sparc/isa
parentf01f8f1be6a536580371428aa3e8e654d97fb868 (diff)
downloadgem5-63fef6b011fc2684a9ef04543c422a442df99932.tar.xz
fix se compiling oops
--HG-- extra : convert_revision : ce7ac94da0ed6bad457a8a9e4c949b0c3b09c2ae
Diffstat (limited to 'src/arch/sparc/isa')
-rw-r--r--src/arch/sparc/isa/decoder.isa4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index e2d1707dd..3684cda69 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -1009,6 +1009,7 @@ decode OP default Unknown::unknown()
0x80: Trap::shutdown({{fault = new IllegalInstruction;}});
0x81: FailUnimpl::siam();
}
+#if FULL_SYSTEM
// M5 special opcodes use the reserved IMPDEP2A opcode space
0x37: decode M5FUNC {
// we have 7 bits of space here to play with...
@@ -1019,6 +1020,9 @@ decode OP default Unknown::unknown()
}}, No_OpClass, IsNonSpeculative);
}
+#else
+ 0x37: Trap::impdep2({{fault = new IllegalInstruction;}});
+#endif
0x38: Branch::jmpl({{
Addr target = Rs1 + Rs2_or_imm13;
if(target & 0x3)