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author | Gabe Black <gblack@eecs.umich.edu> | 2006-08-29 16:06:27 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-08-29 16:06:27 -0400 |
commit | 9231d2235df1a6ec8f439ff5c61de0e49c522c73 (patch) | |
tree | bf573ab71873c28b1e6c47feae143a1875c8da9d /src/arch/sparc/isa | |
parent | df0cbf890a42d87e35ef5bd1dbfb09b358aaa709 (diff) | |
download | gem5-9231d2235df1a6ec8f439ff5c61de0e49c522c73.tar.xz |
Don't store if there's a fault.
--HG--
extra : convert_revision : fc852bee572b36daab7a34ee1820f856ccd71ca5
Diffstat (limited to 'src/arch/sparc/isa')
-rw-r--r-- | src/arch/sparc/isa/formats/mem.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/isa/formats/mem.isa b/src/arch/sparc/isa/formats/mem.isa index 12dae57e5..9011c1fc6 100644 --- a/src/arch/sparc/isa/formats/mem.isa +++ b/src/arch/sparc/isa/formats/mem.isa @@ -111,10 +111,10 @@ def template MemExecute {{ DPRINTF(Sparc, "The address is 0x%x\n", EA); %(load)s; %(code)s; - %(store)s; if(fault == NoFault) { + %(store)s; //Write the resulting state to the execution context %(op_wb)s; } |