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authorSteve Reinhardt <stever@eecs.umich.edu>2006-12-17 19:27:50 -0800
committerSteve Reinhardt <stever@eecs.umich.edu>2006-12-17 19:27:50 -0800
commit968048f56a5f866b267ad9961cbe8d16788bcc89 (patch)
tree1ee95adb6f849be712772796899ee8d316b6ff76 /src/arch/sparc/isa
parentc299c2562b68d75eb457c7206d3ec43e4cabcf14 (diff)
downloadgem5-968048f56a5f866b267ad9961cbe8d16788bcc89.tar.xz
Convert Alpha (and finish converting MIPS) to new
InstObjParam interface. src/arch/alpha/isa/branch.isa: src/arch/alpha/isa/fp.isa: src/arch/alpha/isa/int.isa: src/arch/alpha/isa/main.isa: src/arch/alpha/isa/mem.isa: src/arch/alpha/isa/pal.isa: src/arch/mips/isa/formats/mem.isa: src/arch/mips/isa/formats/util.isa: Get rid of CodeBlock calls to adapt to new InstObjParam interface. src/arch/isa_parser.py: Check template code for operands (in addition to snippets). src/cpu/o3/alpha/dyn_inst.hh: Add (read|write)MiscRegOperand calls to Alpha DynInst. --HG-- extra : convert_revision : 332caf1bee19b014cb62c1ed9e793e793334c8ee
Diffstat (limited to 'src/arch/sparc/isa')
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