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author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-06 05:44:31 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-06 05:44:31 -0500 |
commit | 643cb6dd819845cbc51b63cdc8b7baad89a99df4 (patch) | |
tree | 530e8ad071a015ff160b7644a0c230320de14ace /src/arch/sparc/isa | |
parent | a36a59e8d7c88f4eaa46384328496035116acb99 (diff) | |
download | gem5-643cb6dd819845cbc51b63cdc8b7baad89a99df4.tar.xz |
Added some debug output, and made sure not to accidentally ask for the result of a store conditional.
--HG--
extra : convert_revision : d36ff9e2343fdf78a3bc16a1348975fdba5c55e2
Diffstat (limited to 'src/arch/sparc/isa')
-rw-r--r-- | src/arch/sparc/isa/formats/mem/util.isa | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa index 857f37160..f3adbe19f 100644 --- a/src/arch/sparc/isa/formats/mem/util.isa +++ b/src/arch/sparc/isa/formats/mem/util.isa @@ -144,7 +144,7 @@ def template LoadExecute {{ %(op_decl)s; %(op_rd)s; %(ea_code)s; - DPRINTF(Sparc, "The address is 0x%x\n", EA); + DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); %(fault_check)s; if(fault == NoFault) { @@ -172,6 +172,7 @@ def template LoadExecute {{ %(ea_decl)s; %(ea_rd)s; %(ea_code)s; + DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); %(fault_check)s; if(fault == NoFault) { @@ -202,7 +203,6 @@ def template StoreExecute {{ Trace::InstRecord *traceData) const { Fault fault = NoFault; - uint64_t write_result = 0; //This is to support the conditional store in cas instructions. //It should be optomized out in all the others bool storeCond = true; @@ -210,7 +210,7 @@ def template StoreExecute {{ %(op_decl)s; %(op_rd)s; %(ea_code)s; - DPRINTF(Sparc, "The address is 0x%x\n", EA); + DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); %(fault_check)s; if(fault == NoFault) { @@ -218,7 +218,7 @@ def template StoreExecute {{ } if(storeCond && fault == NoFault) { - fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, &write_result); + fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, 0); } if(fault == NoFault) { @@ -233,13 +233,12 @@ def template StoreExecute {{ Trace::InstRecord * traceData) const { Fault fault = NoFault; - uint64_t write_result = 0; bool storeCond = true; Addr EA; %(op_decl)s; %(op_rd)s; %(ea_code)s; - DPRINTF(Sparc, "The address is 0x%x\n", EA); + DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); %(fault_check)s; if(fault == NoFault) { @@ -247,7 +246,7 @@ def template StoreExecute {{ } if(storeCond && fault == NoFault) { - fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, &write_result); + fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, 0); } if(fault == NoFault) { |