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authorGabe Black <gblack@eecs.umich.edu>2011-07-02 22:34:29 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-07-02 22:34:29 -0700
commitaade13769fc6c666bb855e0745e042c82f9941d6 (patch)
treeb95bd2ff43f1bb84b5d2615e12a6f7788a33a12e /src/arch/sparc/isa
parentd42e471baac69f3f853592ae001e8c5c61377cae (diff)
downloadgem5-aade13769fc6c666bb855e0745e042c82f9941d6.tar.xz
ISA: Use readBytes/writeBytes for all instruction level memory operations.
Diffstat (limited to 'src/arch/sparc/isa')
-rw-r--r--src/arch/sparc/isa/formats/mem/swap.isa11
-rw-r--r--src/arch/sparc/isa/formats/mem/util.isa12
-rw-r--r--src/arch/sparc/isa/includes.isa1
3 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/sparc/isa/formats/mem/swap.isa b/src/arch/sparc/isa/formats/mem/swap.isa
index 99bbf3a68..17a490c4b 100644
--- a/src/arch/sparc/isa/formats/mem/swap.isa
+++ b/src/arch/sparc/isa/formats/mem/swap.isa
@@ -50,8 +50,8 @@ def template SwapExecute {{
}
if (storeCond && fault == NoFault) {
%(EA_trunc)s
- fault = xc->write((uint%(mem_acc_size)s_t)Mem,
- EA, %(asi_val)s, &mem_data);
+ fault = writeMemAtomic(xc, traceData, Mem, EA,
+ %(asi_val)s, &mem_data);
}
if (fault == NoFault) {
// Handle the swapping
@@ -87,8 +87,8 @@ def template SwapInitiateAcc {{
}
if (fault == NoFault) {
%(EA_trunc)s
- fault = xc->write((uint%(mem_acc_size)s_t)Mem,
- EA, %(asi_val)s, &mem_data);
+ fault = writeMemTiming(xc, traceData, Mem, EA, %(asi_val)s,
+ &mem_data);
}
return fault;
}
@@ -103,7 +103,8 @@ def template SwapCompleteAcc {{
Fault fault = NoFault;
%(op_decl)s;
- uint64_t mem_data = pkt->get<uint%(mem_acc_size)s_t>();
+ getMem(pkt, Mem, traceData);
+ uint64_t mem_data = Mem;
if (fault == NoFault) {
// Handle the swapping
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index aaa04b4bf..06206c02b 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -143,7 +143,7 @@ def template LoadExecute {{
%(fault_check)s;
if (fault == NoFault) {
%(EA_trunc)s
- fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
+ fault = readMemAtomic(xc, traceData, EA, Mem, %(asi_val)s);
}
if (fault == NoFault) {
%(code)s;
@@ -171,7 +171,7 @@ def template LoadInitiateAcc {{
%(fault_check)s;
if (fault == NoFault) {
%(EA_trunc)s
- fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
+ fault = readMemTiming(xc, traceData, EA, Mem, %(asi_val)s);
}
return fault;
}
@@ -184,7 +184,7 @@ def template LoadCompleteAcc {{
Fault fault = NoFault;
%(op_decl)s;
%(op_rd)s;
- Mem = pkt->get<typeof(Mem)>();
+ getMem(pkt, Mem, traceData);
%(code)s;
if (fault == NoFault) {
%(op_wb)s;
@@ -214,8 +214,7 @@ def template StoreExecute {{
}
if (storeCond && fault == NoFault) {
%(EA_trunc)s
- fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem,
- EA, %(asi_val)s, 0);
+ fault = writeMemAtomic(xc, traceData, Mem, EA, %(asi_val)s, 0);
}
if (fault == NoFault) {
// Write the resulting state to the execution context
@@ -245,8 +244,7 @@ def template StoreInitiateAcc {{
}
if (storeCond && fault == NoFault) {
%(EA_trunc)s
- fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem,
- EA, %(asi_val)s, 0);
+ fault = writeMemTiming(xc, traceData, Mem, EA, %(asi_val)s, 0);
}
return fault;
}
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index 885cd9cc2..db3677752 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -70,6 +70,7 @@ output exec {{
#include <cmath>
#include <limits>
+#include "arch/generic/memhelpers.hh"
#include "arch/sparc/asi.hh"
#include "base/bigint.hh"
#include "cpu/base.hh"