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authorGabe Black <gabeblack@google.com>2017-11-02 01:58:38 -0700
committerGabe Black <gabeblack@google.com>2017-11-02 09:43:35 +0000
commit8be75f49fd37712e7cf04c0853bb7504f69a04d6 (patch)
treef791cd8adccee52d054f5a10b62948021a3d121b /src/arch/sparc/isa
parent97c68e8fc56baa39ce7901ac1f73d2ff79b550f2 (diff)
downloadgem5-8be75f49fd37712e7cf04c0853bb7504f69a04d6.tar.xz
alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.
The ISA parser used to generate different copies of exec functions for each exec context class a particular CPU wanted to use. That's since been changed so that those functions take a pointer to the base ExecContext, so the code which would generate those extra functions can be removed, and some functions which used to be templated on an ExecContext subclass can be untemplated, or minimally less templated. Now that some functions aren't going to be instantiated multiple times with different signatures, there are also opportunities to collapse templates and make many instruction definitions simpler within the parser. Since those changes will be less mechanical, they're left for later changes and will probably be done in smaller increments. Change-Id: I0015307bb02dfb9c60380b56d2a820f12169ebea Reviewed-on: https://gem5-review.googlesource.com/5381 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/sparc/isa')
-rw-r--r--src/arch/sparc/isa/base.isa4
-rw-r--r--src/arch/sparc/isa/formats/basic.isa10
-rw-r--r--src/arch/sparc/isa/formats/branch.isa4
-rw-r--r--src/arch/sparc/isa/formats/integerop.isa2
-rw-r--r--src/arch/sparc/isa/formats/mem/swap.isa6
-rw-r--r--src/arch/sparc/isa/formats/mem/util.isa20
-rw-r--r--src/arch/sparc/isa/formats/micro.isa6
-rw-r--r--src/arch/sparc/isa/formats/nop.isa4
-rw-r--r--src/arch/sparc/isa/formats/priv.isa2
-rw-r--r--src/arch/sparc/isa/formats/trap.isa4
-rw-r--r--src/arch/sparc/isa/formats/unimp.isa4
-rw-r--r--src/arch/sparc/isa/formats/unknown.isa2
12 files changed, 34 insertions, 34 deletions
diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa
index 4b61c940c..5d54d0ea9 100644
--- a/src/arch/sparc/isa/base.isa
+++ b/src/arch/sparc/isa/base.isa
@@ -565,7 +565,7 @@ output exec {{
/// @retval Full-system mode: NoFault if FP is enabled, FpDisabled
/// if not. Non-full-system mode: always returns NoFault.
static inline Fault
- checkFpEnableFault(CPU_EXEC_CONTEXT *xc)
+ checkFpEnableFault(ExecContext *xc)
{
if (FullSystem) {
PSTATE pstate = xc->readMiscReg(MISCREG_PSTATE);
@@ -579,7 +579,7 @@ output exec {{
}
}
static inline Fault
- checkVecEnableFault(CPU_EXEC_CONTEXT *xc)
+ checkVecEnableFault(ExecContext *xc)
{
return std::make_shared<VecDisabled>();
}
diff --git a/src/arch/sparc/isa/formats/basic.isa b/src/arch/sparc/isa/formats/basic.isa
index 7d70e8e60..a81de05ad 100644
--- a/src/arch/sparc/isa/formats/basic.isa
+++ b/src/arch/sparc/isa/formats/basic.isa
@@ -30,18 +30,18 @@
// Declarations for execute() methods.
def template BasicExecDeclare {{
- Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
}};
def template DoFpOpDeclare {{
- Fault doFpOp(%(CPU_exec_context)s *, Trace::InstRecord *)
+ Fault doFpOp(ExecContext *, Trace::InstRecord *)
const M5_NO_INLINE;
}};
// Definitions of execute methods that panic.
def template BasicExecPanic {{
Fault
- execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
+ execute(ExecContext *, Trace::InstRecord *) const
{
panic("Execute method called when it shouldn't!");
M5_DUMMY_RETURN
@@ -113,7 +113,7 @@ def template BasicConstructorWithMnemonic {{
// Basic instruction class execute method template.
def template BasicExecute {{
Fault
- %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -132,7 +132,7 @@ def template BasicExecute {{
def template DoFpOpExecute {{
Fault
- %(class_name)s::doFpOp(CPU_EXEC_CONTEXT *xc,
+ %(class_name)s::doFpOp(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/branch.isa b/src/arch/sparc/isa/formats/branch.isa
index eb289931e..b23790738 100644
--- a/src/arch/sparc/isa/formats/branch.isa
+++ b/src/arch/sparc/isa/formats/branch.isa
@@ -186,7 +186,7 @@ output decoder {{
}};
def template JumpExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
// Attempt to execute the instruction
@@ -208,7 +208,7 @@ def template JumpExecute {{
def template BranchExecute {{
Fault
- %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
// Attempt to execute the instruction
diff --git a/src/arch/sparc/isa/formats/integerop.isa b/src/arch/sparc/isa/formats/integerop.isa
index e60c93cd2..93e5614af 100644
--- a/src/arch/sparc/isa/formats/integerop.isa
+++ b/src/arch/sparc/isa/formats/integerop.isa
@@ -237,7 +237,7 @@ output decoder {{
}};
def template IntOpExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/mem/swap.isa b/src/arch/sparc/isa/formats/mem/swap.isa
index 34dabc8cb..c35fffd97 100644
--- a/src/arch/sparc/isa/formats/mem/swap.isa
+++ b/src/arch/sparc/isa/formats/mem/swap.isa
@@ -29,7 +29,7 @@
// This template provides the execute functions for a swap
def template SwapExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -68,7 +68,7 @@ def template SwapExecute {{
def template SwapInitiateAcc {{
- Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::initiateAcc(ExecContext * xc,
Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
@@ -97,7 +97,7 @@ def template SwapInitiateAcc {{
def template SwapCompleteAcc {{
- Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext * xc,
Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index 00e09ce54..ff14f060f 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -130,7 +130,7 @@ output decoder {{
// This template provides the execute functions for a load
def template LoadExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -158,7 +158,7 @@ def template LoadExecute {{
}};
def template LoadInitiateAcc {{
- Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::initiateAcc(ExecContext * xc,
Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
@@ -178,7 +178,7 @@ def template LoadInitiateAcc {{
}};
def template LoadCompleteAcc {{
- Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext * xc,
Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
@@ -195,7 +195,7 @@ def template LoadCompleteAcc {{
// This template provides the execute functions for a store
def template StoreExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -226,7 +226,7 @@ def template StoreExecute {{
}};
def template StoreInitiateAcc {{
- Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::initiateAcc(ExecContext * xc,
Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
@@ -251,7 +251,7 @@ def template StoreInitiateAcc {{
}};
def template StoreCompleteAcc {{
- Fault %(class_name)s::completeAcc(PacketPtr, CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::completeAcc(PacketPtr, ExecContext * xc,
Trace::InstRecord * traceData) const
{
return NoFault;
@@ -260,7 +260,7 @@ def template StoreCompleteAcc {{
def template EACompExecute {{
Fault
- %(class_name)s::eaComp(CPU_EXEC_CONTEXT *xc,
+ %(class_name)s::eaComp(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Addr EA;
@@ -281,17 +281,17 @@ def template EACompExecute {{
}};
def template EACompDeclare {{
- Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault eaComp(ExecContext *, Trace::InstRecord *) const;
}};
// This delcares the initiateAcc function in memory operations
def template InitiateAccDeclare {{
- Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
}};
// This declares the completeAcc function in memory operations
def template CompleteAccDeclare {{
- Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
}};
// Here are some code snippets which check for various fault conditions
diff --git a/src/arch/sparc/isa/formats/micro.isa b/src/arch/sparc/isa/formats/micro.isa
index 2138ba6f5..c57d9346d 100644
--- a/src/arch/sparc/isa/formats/micro.isa
+++ b/src/arch/sparc/isa/formats/micro.isa
@@ -29,7 +29,7 @@
// This delcares the initiateAcc function in memory operations
def template MacroInitiateAcc {{
Fault
- initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const
+ initiateAcc(ExecContext *, Trace::InstRecord *) const
{
panic("Tried to execute a macroop directly!\n");
return NoFault;
@@ -38,7 +38,7 @@ def template MacroInitiateAcc {{
def template MacroCompleteAcc {{
Fault
- completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const
+ completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const
{
panic("Tried to execute a macroop directly!\n");
return NoFault;
@@ -48,7 +48,7 @@ def template MacroCompleteAcc {{
// This template provides the execute functions for a store
def template MacroExecute {{
Fault
- execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
+ execute(ExecContext *, Trace::InstRecord *) const
{
panic("Tried to execute a macroop directly!\n");
return NoFault;
diff --git a/src/arch/sparc/isa/formats/nop.isa b/src/arch/sparc/isa/formats/nop.isa
index aab1f198d..e725f49b0 100644
--- a/src/arch/sparc/isa/formats/nop.isa
+++ b/src/arch/sparc/isa/formats/nop.isa
@@ -35,7 +35,7 @@
// Per-cpu-model nop execute method.
def template NopExec {{
- Fault execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
+ Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const
{
// Nothing to see here, move along
return NoFault;
@@ -79,7 +79,7 @@ output decoder {{
}};
def template NopExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
// Nothing to see here, move along
diff --git a/src/arch/sparc/isa/formats/priv.isa b/src/arch/sparc/isa/formats/priv.isa
index 3f6d35330..c581f0fef 100644
--- a/src/arch/sparc/isa/formats/priv.isa
+++ b/src/arch/sparc/isa/formats/priv.isa
@@ -195,7 +195,7 @@ def template ControlRegConstructor {{
}};
def template PrivExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
%(op_decl)s;
diff --git a/src/arch/sparc/isa/formats/trap.isa b/src/arch/sparc/isa/formats/trap.isa
index fff30f8ee..8b9ef8c8e 100644
--- a/src/arch/sparc/isa/formats/trap.isa
+++ b/src/arch/sparc/isa/formats/trap.isa
@@ -72,7 +72,7 @@ output decoder {{
def template TrapExecute {{
Fault
- %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -85,7 +85,7 @@ def template TrapExecute {{
def template FpUnimplExecute {{
Fault
- %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/unimp.isa b/src/arch/sparc/isa/formats/unimp.isa
index bd87942ad..f612b8bc6 100644
--- a/src/arch/sparc/isa/formats/unimp.isa
+++ b/src/arch/sparc/isa/formats/unimp.isa
@@ -109,7 +109,7 @@ output decoder {{
output exec {{
Fault
- FailUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
+ FailUnimplemented::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
panic("attempt to execute unimplemented instruction '%s' "
@@ -118,7 +118,7 @@ output exec {{
}
Fault
- WarnUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
+ WarnUnimplemented::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
if (!warned) {
diff --git a/src/arch/sparc/isa/formats/unknown.isa b/src/arch/sparc/isa/formats/unknown.isa
index 2bff7dcf8..226f0191e 100644
--- a/src/arch/sparc/isa/formats/unknown.isa
+++ b/src/arch/sparc/isa/formats/unknown.isa
@@ -63,7 +63,7 @@ output decoder {{
}};
output exec {{
- Fault Unknown::execute(CPU_EXEC_CONTEXT *xc,
+ Fault Unknown::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
return std::make_shared<IllegalInstruction>();