sparc: Move the mem base classes out of the ISA description.

Change-Id: Ifbeee464e2d7f872e192f065ad3494f52d274596
Reviewed-on: https://gem5-review.googlesource.com/5482
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

3 files changed, 2 insertions, 213 deletions

diff --git a/src/arch/sparc/isa/formats/mem/blockmem.isa b/src/arch/sparc/isa/formats/mem/blockmem.isa
index 3e3aabfcb..05ddc63b3 100644
--- a/src/arch/sparc/isa/formats/mem/blockmem.isa
+++ b/src/arch/sparc/isa/formats/mem/blockmem.isa
@@ -32,119 +32,6 @@
 // Block Memory instructions
 //
 
-output header {{
-
-        class BlockMem : public SparcMacroInst
-        {
-          protected:
-
-            // Constructor
-            // We make the assumption that all block memory operations
-            // Will take 8 instructions to execute
-            BlockMem(const char *mnem, ExtMachInst _machInst) :
-                SparcMacroInst(mnem, _machInst, No_OpClass, 8)
-            {}
-        };
-
-        class BlockMemImm : public BlockMem
-        {
-          protected:
-
-            // Constructor
-            BlockMemImm(const char *mnem, ExtMachInst _machInst) :
-                BlockMem(mnem, _machInst)
-            {}
-        };
-
-        class BlockMemMicro : public SparcMicroInst
-        {
-          protected:
-
-            // Constructor
-            BlockMemMicro(const char *mnem, ExtMachInst _machInst,
-                    OpClass __opClass, int8_t _offset) :
-                SparcMicroInst(mnem, _machInst, __opClass),
-                offset(_offset)
-            {}
-
-            std::string generateDisassembly(Addr pc,
-                const SymbolTable *symtab) const;
-
-            const int8_t offset;
-        };
-
-        class BlockMemImmMicro : public BlockMemMicro
-        {
-          protected:
-
-            // Constructor
-            BlockMemImmMicro(const char *mnem, ExtMachInst _machInst,
-                    OpClass __opClass, int8_t _offset) :
-                BlockMemMicro(mnem, _machInst, __opClass, _offset),
-                imm(sext<13>(SIMM13))
-            {}
-
-            std::string generateDisassembly(Addr pc,
-                const SymbolTable *symtab) const;
-
-            const int32_t imm;
-        };
-}};
-
-output decoder {{
-        std::string BlockMemMicro::generateDisassembly(Addr pc,
-                const SymbolTable *symtab) const
-        {
-            std::stringstream response;
-            bool load = flags[IsLoad];
-            bool save = flags[IsStore];
-
-            printMnemonic(response, mnemonic);
-            if (save) {
-                printReg(response, _srcRegIdx[0]);
-                ccprintf(response, ", ");
-            }
-            ccprintf(response, "[ ");
-            printReg(response, _srcRegIdx[!save ? 0 : 1]);
-            ccprintf(response, " + ");
-            printReg(response, _srcRegIdx[!save ? 1 : 2]);
-            ccprintf(response, " ]");
-            if (load) {
-                ccprintf(response, ", ");
-                printReg(response, _destRegIdx[0]);
-            }
-
-            return response.str();
-        }
-
-        std::string BlockMemImmMicro::generateDisassembly(Addr pc,
-                const SymbolTable *symtab) const
-        {
-            std::stringstream response;
-            bool load = flags[IsLoad];
-            bool save = flags[IsStore];
-
-            printMnemonic(response, mnemonic);
-            if (save) {
-                printReg(response, _srcRegIdx[1]);
-                ccprintf(response, ", ");
-            }
-            ccprintf(response, "[ ");
-            printReg(response, _srcRegIdx[0]);
-            if (imm >= 0)
-                ccprintf(response, " + 0x%x ]", imm);
-            else
-                ccprintf(response, " + -0x%x ]", -imm);
-            if (load) {
-                ccprintf(response, ", ");
-                printReg(response, _destRegIdx[0]);
-            }
-
-            return response.str();
-        }
-
-}};
-
 def template BlockMemDeclare {{
         /**
          * Static instruction class for a block memory operation
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index 4d7fc0608..ad43a6810 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -33,101 +33,6 @@
 // Mem utility templates and functions
 //
 
-output header {{
-        /**
-         * Base class for memory operations.
-         */
-        class Mem : public SparcStaticInst
-        {
-          protected:
-
-            // Constructor
-            Mem(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
-                SparcStaticInst(mnem, _machInst, __opClass)
-            {
-            }
-
-            std::string generateDisassembly(Addr pc,
-                    const SymbolTable *symtab) const;
-        };
-
-        /**
-         * Class for memory operations which use an immediate offset.
-         */
-        class MemImm : public Mem
-        {
-          protected:
-
-            // Constructor
-            MemImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
-                Mem(mnem, _machInst, __opClass), imm(sext<13>(SIMM13))
-            {}
-
-            std::string generateDisassembly(Addr pc,
-                    const SymbolTable *symtab) const;
-
-            const int32_t imm;
-        };
-}};
-
-output decoder {{
-        std::string Mem::generateDisassembly(Addr pc,
-                const SymbolTable *symtab) const
-        {
-            std::stringstream response;
-            bool load = flags[IsLoad];
-            bool store = flags[IsStore];
-
-            printMnemonic(response, mnemonic);
-            if (store) {
-                printReg(response, _srcRegIdx[0]);
-                ccprintf(response, ", ");
-            }
-            ccprintf(response, "[");
-            if (_srcRegIdx[!store ? 0 : 1].index() != 0) {
-                printSrcReg(response, !store ? 0 : 1);
-                ccprintf(response, " + ");
-            }
-            printSrcReg(response, !store ? 1 : 2);
-            ccprintf(response, "]");
-            if (load) {
-                ccprintf(response, ", ");
-                printReg(response, _destRegIdx[0]);
-            }
-
-            return response.str();
-        }
-
-        std::string MemImm::generateDisassembly(Addr pc,
-                const SymbolTable *symtab) const
-        {
-            std::stringstream response;
-            bool load = flags[IsLoad];
-            bool save = flags[IsStore];
-
-            printMnemonic(response, mnemonic);
-            if (save) {
-                printReg(response, _srcRegIdx[0]);
-                ccprintf(response, ", ");
-            }
-            ccprintf(response, "[");
-            if (_srcRegIdx[!save ? 0 : 1].index() != 0) {
-                printReg(response, _srcRegIdx[!save ? 0 : 1]);
-                ccprintf(response, " + ");
-            }
-            if (imm >= 0)
-                ccprintf(response, "0x%x]", imm);
-            else
-                ccprintf(response, "-0x%x]", -imm);
-            if (load) {
-                ccprintf(response, ", ");
-                printReg(response, _destRegIdx[0]);
-            }
-
-            return response.str();
-        }
-}};
-
 // This template provides the execute functions for a load
 def template LoadExecute {{
         Fault %(class_name)s::execute(ExecContext *xc,
@@ -280,11 +185,6 @@ def template EACompExecute {{
     }
 }};
 
-// This declares the completeAcc function in memory operations
-def template CompleteAccDeclare {{
-    Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
-}};
-
 // Here are some code snippets which check for various fault conditions
 let {{
     LoadFuncs = [LoadExecute, LoadInitiateAcc, LoadCompleteAcc]
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index a33a44ed9..49edccb0b 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -39,7 +39,9 @@ output header {{
 #include <sstream>
 
 #include "arch/sparc/faults.hh"
+#include "arch/sparc/insts/blockmem.hh"
 #include "arch/sparc/insts/branch.hh"
+#include "arch/sparc/insts/mem.hh"
 #include "arch/sparc/insts/micro.hh"
 #include "arch/sparc/insts/nop.hh"
 #include "arch/sparc/insts/priv.hh"