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authorGabe Black <gabeblack@google.com>2017-11-06 18:22:38 -0800
committerGabe Black <gabeblack@google.com>2017-11-22 00:19:11 +0000
commita5eee974589898999b4f32c6ee24044b4a4d8100 (patch)
treefa80b387820aa0e5de5b352fde16ff99b0551575 /src/arch/sparc/isa
parent7723adff2671cda828f1b482765b2a5d7d2039ed (diff)
downloadgem5-a5eee974589898999b4f32c6ee24044b4a4d8100.tar.xz
sparc: Pull more StaticInst base classes out of the ISA desc.
These are for the trap and branch instructions. Change-Id: Idedab6f3e6c6c954c1f8a36dae52976cf25ad394 Reviewed-on: https://gem5-review.googlesource.com/5461 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/sparc/isa')
-rw-r--r--src/arch/sparc/isa/formats/branch.isa153
-rw-r--r--src/arch/sparc/isa/formats/trap.isa56
-rw-r--r--src/arch/sparc/isa/includes.isa2
3 files changed, 2 insertions, 209 deletions
diff --git a/src/arch/sparc/isa/formats/branch.isa b/src/arch/sparc/isa/formats/branch.isa
index b23790738..98f6c7f7e 100644
--- a/src/arch/sparc/isa/formats/branch.isa
+++ b/src/arch/sparc/isa/formats/branch.isa
@@ -32,159 +32,6 @@
// Branch instructions
//
-output header {{
- /**
- * Base class for branch operations.
- */
- class Branch : public SparcStaticInst
- {
- protected:
- // Constructor
- Branch(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for branch operations with an immediate displacement.
- */
- class BranchDisp : public Branch
- {
- protected:
- // Constructor
- BranchDisp(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- Branch(mnem, _machInst, __opClass)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- int32_t disp;
- };
-
- /**
- * Base class for branches with n bit displacements.
- */
- template<int bits>
- class BranchNBits : public BranchDisp
- {
- protected:
- // Constructor
- BranchNBits(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- BranchDisp(mnem, _machInst, __opClass)
- {
- disp = sext<bits + 2>((_machInst & mask(bits)) << 2);
- }
- };
-
- /**
- * Base class for 16bit split displacements.
- */
- class BranchSplit : public BranchDisp
- {
- protected:
- // Constructor
- BranchSplit(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass) :
- BranchDisp(mnem, _machInst, __opClass)
- {
- disp = sext<18>((D16HI << 16) | (D16LO << 2));
- }
- };
-
- /**
- * Base class for branches that use an immediate and a register to
- * compute their displacements.
- */
- class BranchImm13 : public Branch
- {
- protected:
- // Constructor
- BranchImm13(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- Branch(mnem, _machInst, __opClass), imm(sext<13>(SIMM13))
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- int32_t imm;
- };
-}};
-
-output decoder {{
-
- template class BranchNBits<19>;
-
- template class BranchNBits<22>;
-
- template class BranchNBits<30>;
-
- std::string
- Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- printMnemonic(response, mnemonic);
- printRegArray(response, _srcRegIdx, _numSrcRegs);
- if (_numDestRegs && _numSrcRegs)
- response << ", ";
- printDestReg(response, 0);
-
- return response.str();
- }
-
- std::string
- BranchImm13::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- printMnemonic(response, mnemonic);
- printRegArray(response, _srcRegIdx, _numSrcRegs);
- if (_numSrcRegs > 0)
- response << ", ";
- ccprintf(response, "0x%x", imm);
- if (_numDestRegs > 0)
- response << ", ";
- printDestReg(response, 0);
-
- return response.str();
- }
-
- std::string
- BranchDisp::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- std::stringstream response;
- std::string symbol;
- Addr symbolAddr;
-
- Addr target = disp + pc;
-
- printMnemonic(response, mnemonic);
- ccprintf(response, "0x%x", target);
-
- if (symtab &&
- symtab->findNearestSymbol(target, symbol, symbolAddr)) {
- ccprintf(response, " <%s", symbol);
- if (symbolAddr != target)
- ccprintf(response, "+%d>", target - symbolAddr);
- else
- ccprintf(response, ">");
- }
-
- return response.str();
- }
-}};
-
def template JumpExecute {{
Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
diff --git a/src/arch/sparc/isa/formats/trap.isa b/src/arch/sparc/isa/formats/trap.isa
index 8b9ef8c8e..301ede7a6 100644
--- a/src/arch/sparc/isa/formats/trap.isa
+++ b/src/arch/sparc/isa/formats/trap.isa
@@ -32,44 +32,6 @@
// Trap instructions
//
-output header {{
- /**
- * Base class for trap instructions,
- * or instructions that always fault.
- */
- class Trap : public SparcStaticInst
- {
- protected:
-
- // Constructor
- Trap(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
- SparcStaticInst(mnem, _machInst, __opClass), trapNum(SW_TRAP)
- {
- }
-
- std::string generateDisassembly(Addr pc,
- const SymbolTable *symtab) const;
-
- int trapNum;
- };
-}};
-
-output decoder {{
- std::string
- Trap::generateDisassembly(Addr pc, const SymbolTable *symtab) const
- {
- std::stringstream response;
-
- printMnemonic(response, mnemonic);
- ccprintf(response, " ");
- printReg(response, _srcRegIdx[0]);
- ccprintf(response, ", 0x%x", trapNum);
- ccprintf(response, ", or ");
- printReg(response, _srcRegIdx[1]);
- return response.str();
- }
-}};
-
def template TrapExecute {{
Fault
%(class_name)s::execute(ExecContext *xc,
@@ -105,24 +67,6 @@ def format Trap(code, *opt_flags) {{
exec_output = TrapExecute.subst(iop)
}};
-output header {{
- class FpUnimpl : public SparcStaticInst
- {
- protected:
- FpUnimpl(const char *mnem,
- ExtMachInst _machInst, OpClass __opClass)
- : SparcStaticInst(mnem, _machInst, __opClass)
- {
- }
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const
- {
- return mnemonic;
- }
- };
-}};
-
def format FpUnimpl(*flags) {{
fpunimpl_code = '''
Fsr = insertBits(Fsr, 16, 14, 3);
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index eba30976d..599677eb9 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -39,8 +39,10 @@ output header {{
#include <sstream>
#include "arch/sparc/faults.hh"
+#include "arch/sparc/insts/branch.hh"
#include "arch/sparc/insts/priv.hh"
#include "arch/sparc/insts/static_inst.hh"
+#include "arch/sparc/insts/trap.hh"
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/registers.hh"
#include "base/condcodes.hh"