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authorAli Saidi <saidi@eecs.umich.edu>2007-02-02 18:04:42 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-02-02 18:04:42 -0500
commit592f35ac0ff8d525fad2dc606b53b4cd8b84fd69 (patch)
treecdd2cf069de41c1f1fbf58a567dd5d855dce769c /src/arch/sparc/isa_traits.hh
parent5c7192daedcd33d9f7deb42406002adf4f2ffb68 (diff)
downloadgem5-592f35ac0ff8d525fad2dc606b53b4cd8b84fd69.tar.xz
fix mostly floating point related
src/arch/sparc/floatregfile.cc: fix fp read/writing to registers... looking for suggestions on cleaner ways if anyone has them src/arch/sparc/isa/decoder.isa: fix some fp implementations src/arch/sparc/isa/formats/basic.isa: add new fp op class that 0 cexec in fsr and sets rounding mode for the up comming op src/arch/sparc/isa/includes.isa: include the appropriate header files for the rounding code src/arch/sparc/miscregfile.cc: print fsr out when it's read/written and the Sparc traceflgas in on src/cpu/exetrace.cc: fix printing of float registers --HG-- extra : convert_revision : 49faab27f2e786a8455f9ca0f3f0132380c9d992
Diffstat (limited to 'src/arch/sparc/isa_traits.hh')
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