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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-10-29 01:58:37 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-10-29 01:58:37 -0500 |
| commit | 6dddca951151c953fdab6f3e57b9385150d8b90b (patch) | |
| tree | 62b85fcb502db373bafd333e93915a8b562c9c90 /src/arch/sparc/isa_traits.hh | |
| parent | 61c808ae1c79c5674f7c8dc2a7bbb2cddc3d7296 (diff) | |
| download | gem5-6dddca951151c953fdab6f3e57b9385150d8b90b.tar.xz | |
Add an integer microcode register.
--HG--
extra : convert_revision : f23dbfdfe44e8e6cdd6948000669ad4f743b9fb4
Diffstat (limited to 'src/arch/sparc/isa_traits.hh')
| -rw-r--r-- | src/arch/sparc/isa_traits.hh | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh index fb09121a3..46a0ebbfb 100644 --- a/src/arch/sparc/isa_traits.hh +++ b/src/arch/sparc/isa_traits.hh @@ -57,13 +57,17 @@ namespace SparcISA //This makes sure the big endian versions of certain functions are used. using namespace BigEndianGuest; - // SPARC have a delay slot + // SPARC has a delay slot #define ISA_HAS_DELAY_SLOT 1 // SPARC NOP (sethi %(hi(0), g0) const MachInst NoopMachInst = 0x01000000; - const int NumIntRegs = 32; + const int NumRegularIntRegs = 32; + const int NumMicroIntRegs = 1; + const int NumIntRegs = + NumRegularIntRegs + + NumMicroIntRegs; const int NumFloatRegs = 64; const int NumMiscRegs = 40; |