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authorGabe Black <gabeblack@google.com>2019-04-29 16:28:58 -0700
committerGabe Black <gabeblack@google.com>2019-04-30 18:52:13 +0000
commit90f90b809c2945952af7cd19bacb82d1ef129869 (patch)
tree3b28d77290067ca7702abebe9562da2eacd87c1d /src/arch/sparc/isa_traits.hh
parentf19884d5caf6671a45c1fede69d4d019e76ad4f3 (diff)
downloadgem5-90f90b809c2945952af7cd19bacb82d1ef129869.tar.xz
sparc: Move translation constants from isa_traits.hh into tlb.hh.
These aren't used outside of SPARC. Also get rid of some unused constants. Change-Id: Icfe119f88189348245a6f225a61e62dfa93ea951 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18470 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/sparc/isa_traits.hh')
-rw-r--r--src/arch/sparc/isa_traits.hh12
1 files changed, 0 insertions, 12 deletions
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 5bcfc04a4..f42cdb9f5 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -44,23 +44,11 @@ namespace SparcISA
// This makes sure the big endian versions of certain functions are used.
using namespace BigEndianGuest;
-// real address virtual mapping
-// sort of like alpha super page, but less frequently used
-const Addr SegKPMEnd = ULL(0xfffffffc00000000);
-const Addr SegKPMBase = ULL(0xfffffac000000000);
-
const Addr PageShift = 13;
const Addr PageBytes = ULL(1) << PageShift;
StaticInstPtr decodeInst(ExtMachInst);
-/////////// TLB Stuff ////////////
-const Addr StartVAddrHole = ULL(0x0000800000000000);
-const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF);
-const Addr VAddrAMask = ULL(0xFFFFFFFF);
-const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
-const Addr BytesInPageMask = ULL(0x1FFF);
-
// Memory accesses cannot be unaligned
const bool HasUnalignedMemAcc = false;