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authorAli Saidi <Ali.Saidi@ARM.com>2013-01-07 13:05:33 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2013-01-07 13:05:33 -0500
commit69d419f31383ac7801e1debb62d5bbf7cb899e3c (patch)
tree8081815bc613db0126c785f0b14a6ade6a651ad1 /src/arch/sparc/locked_mem.hh
parent5146a69835bc9ba37fba7d3b0ff72ecaf9b98b74 (diff)
downloadgem5-69d419f31383ac7801e1debb62d5bbf7cb899e3c.tar.xz
o3: Fix issue with LLSC ordering and speculation
This patch unlocks the cpu-local monitor when the CPU sees a snoop to a locked address. Previously we relied on the cache to handle the locking for us, however some users on the gem5 mailing list reported a case where the cpu speculatively executes a ll operation after a pending sc operation in the pipeline and that makes the cache monitor valid. This should handle that case by invaliding the local monitor.
Diffstat (limited to 'src/arch/sparc/locked_mem.hh')
-rw-r--r--src/arch/sparc/locked_mem.hh7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/sparc/locked_mem.hh b/src/arch/sparc/locked_mem.hh
index 556fbbdd9..8277ef487 100644
--- a/src/arch/sparc/locked_mem.hh
+++ b/src/arch/sparc/locked_mem.hh
@@ -37,12 +37,19 @@
* ISA-specific helper functions for locked memory accesses.
*/
+#include "mem/packet.hh"
#include "mem/request.hh"
namespace SparcISA
{
template <class XC>
inline void
+handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask)
+{
+}
+
+template <class XC>
+inline void
handleLockedRead(XC *xc, Request *req)
{
}