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authorGabe Black <gblack@eecs.umich.edu>2007-03-07 20:04:45 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-07 20:04:45 +0000
commit8edc9d79cee3edd6d16a8254a0180aaa242974c7 (patch)
tree9ac7148f0862e81210fe929fcd61496ea7216727 /src/arch/sparc/miscregfile.cc
parentc82251326986affba0224460552236ebfe3447c2 (diff)
parent49527ab55312bf02dfce20c45db8f173b0c2324e (diff)
downloadgem5-8edc9d79cee3edd6d16a8254a0180aaa242974c7.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem --HG-- extra : convert_revision : d764fe37c71269a04fcede6cbf30e24262447e89
Diffstat (limited to 'src/arch/sparc/miscregfile.cc')
-rw-r--r--src/arch/sparc/miscregfile.cc12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc
index 849eed1cc..e7b866e6f 100644
--- a/src/arch/sparc/miscregfile.cc
+++ b/src/arch/sparc/miscregfile.cc
@@ -140,7 +140,7 @@ void MiscRegFile::clear()
#endif
}
-MiscReg MiscRegFile::readReg(int miscReg)
+MiscReg MiscRegFile::readRegNoEffect(int miscReg)
{
switch (miscReg) {
case MISCREG_TLB_DATA:
@@ -331,7 +331,7 @@ MiscReg MiscRegFile::readReg(int miscReg)
}
}
-MiscReg MiscRegFile::readRegWithEffect(int miscReg, ThreadContext * tc)
+MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
{
switch (miscReg) {
// tick and stick are aliased to each other in niagra
@@ -386,10 +386,10 @@ MiscReg MiscRegFile::readRegWithEffect(int miscReg, ThreadContext * tc)
#endif
}
- return readReg(miscReg);
+ return readRegNoEffect(miscReg);
}
-void MiscRegFile::setReg(int miscReg, const MiscReg &val)
+void MiscRegFile::setRegNoEffect(int miscReg, const MiscReg &val)
{
switch (miscReg) {
// case MISCREG_Y:
@@ -621,7 +621,7 @@ void MiscRegFile::setReg(int miscReg, const MiscReg &val)
}
}
-void MiscRegFile::setRegWithEffect(int miscReg,
+void MiscRegFile::setReg(int miscReg,
const MiscReg &val, ThreadContext * tc)
{
MiscReg new_val = val;
@@ -692,7 +692,7 @@ void MiscRegFile::setRegWithEffect(int miscReg,
panic("Accessing Fullsystem register %s to %#x in SE mode\n", getMiscRegName(miscReg), val);
#endif
}
- setReg(miscReg, new_val);
+ setRegNoEffect(miscReg, new_val);
}
void MiscRegFile::serialize(std::ostream & os)