diff options
author | Nathan Binkert <nate@binkert.org> | 2008-10-21 07:12:53 -0700 |
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committer | Nathan Binkert <nate@binkert.org> | 2008-10-21 07:12:53 -0700 |
commit | 9836d81c2bba97e36c43ca22feee1d51a12ce6ac (patch) | |
tree | eaa352df03cfe58d315e975bbe2a6384c801f221 /src/arch/sparc/miscregfile.cc | |
parent | aac93b7d0ce5e8e0241c7299b49cc59a9d095f3e (diff) | |
download | gem5-9836d81c2bba97e36c43ca22feee1d51a12ce6ac.tar.xz |
style: Use the correct m5 style for things relating to interrupts.
Diffstat (limited to 'src/arch/sparc/miscregfile.cc')
-rw-r--r-- | src/arch/sparc/miscregfile.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc index b0c5dbda9..b22ceb657 100644 --- a/src/arch/sparc/miscregfile.cc +++ b/src/arch/sparc/miscregfile.cc @@ -542,9 +542,9 @@ void MiscRegFile::setReg(int miscReg, tl = val; #if FULL_SYSTEM if (hpstate & HPSTATE::tlz && tl == 0 && !(hpstate & HPSTATE::hpriv)) - tc->getCpuPtr()->post_interrupt(IT_TRAP_LEVEL_ZERO,0); + tc->getCpuPtr()->postInterrupt(IT_TRAP_LEVEL_ZERO, 0); else - tc->getCpuPtr()->clear_interrupt(IT_TRAP_LEVEL_ZERO,0); + tc->getCpuPtr()->clearInterrupt(IT_TRAP_LEVEL_ZERO, 0); #endif return; case MISCREG_CWP: |