diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2007-05-08 13:02:19 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-05-08 13:02:19 +0000 |
| commit | dc1c9e03007f084caabc995b41616603e0a004dc (patch) | |
| tree | 1402fed796d3368c96a35f5cc48b400e3e5b93dc /src/arch/sparc/process.cc | |
| parent | 6fec6d278a625756d4eec6fd2cb88c4d99cec4ae (diff) | |
| download | gem5-dc1c9e03007f084caabc995b41616603e0a004dc.tar.xz | |
Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed.
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
Diffstat (limited to 'src/arch/sparc/process.cc')
| -rw-r--r-- | src/arch/sparc/process.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index e4774ab54..11fa9be28 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -87,8 +87,8 @@ Sparc32LiveProcess::startup() //From the SPARC ABI - //The process runs in user mode - threadContexts[0]->setMiscReg(MISCREG_PSTATE, 0x02); + //The process runs in user mode with 32 bit addresses + threadContexts[0]->setMiscReg(MISCREG_PSTATE, 0x0a); //Setup default FP state threadContexts[0]->setMiscRegNoEffect(MISCREG_FSR, 0); |