SPARC: Move tlb state into the tlb.

Each "strand" may need to have a private copy of this state, but I couldn't
find anywhere in the spec that said that after looking briefly.
This prevents writes to the thread context in o3 which was causing the
pipeline to be flushed and stopping any forward progress. The other ASI
accessible state will probably need to be accessed differently if/when we get
O3 full system up and running.

--HG--
extra : convert_revision : fa7fba812d7f76564ef4a23818e60f536710d557

1 files changed, 0 insertions, 36 deletions

diff --git a/src/arch/sparc/regfile.cc b/src/arch/sparc/regfile.cc
index 667b1f002..d6be52424 100644
--- a/src/arch/sparc/regfile.cc
+++ b/src/arch/sparc/regfile.cc
@@ -326,42 +326,6 @@ void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
     dest->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL,
             src->readMiscRegNoEffect(MISCREG_MMU_LSU_CTRL));
 
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_C0_TSB_PS0,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_C0_TSB_PS0));
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_C0_TSB_PS1,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_C0_TSB_PS1));
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_C0_CONFIG,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_C0_CONFIG));
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_CX_TSB_PS0,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_CX_TSB_PS0));
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_CX_TSB_PS1,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_CX_TSB_PS1));
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_CX_CONFIG,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_CX_CONFIG));
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_SFSR,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_SFSR));
-    dest->setMiscRegNoEffect(MISCREG_MMU_ITLB_TAG_ACCESS,
-            src->readMiscRegNoEffect(MISCREG_MMU_ITLB_TAG_ACCESS));
-
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_C0_TSB_PS0,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_C0_TSB_PS0));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_C0_TSB_PS1,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_C0_TSB_PS1));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_C0_CONFIG,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_C0_CONFIG));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_CX_TSB_PS0,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_CX_TSB_PS0));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_CX_TSB_PS1,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_CX_TSB_PS1));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_CX_CONFIG,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_CX_CONFIG));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_SFSR,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_SFSR));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_SFAR,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_SFAR));
-    dest->setMiscRegNoEffect(MISCREG_MMU_DTLB_TAG_ACCESS,
-            src->readMiscRegNoEffect(MISCREG_MMU_DTLB_TAG_ACCESS));
-
     // Scratchpad Registers
     dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R0,
             src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R0));