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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:20 -0700 |
| commit | faa6ebebe1121170778d005b384a21ce6da10308 (patch) | |
| tree | 60dc96e74e95dc37ffc2d0edab50efd825d6191c /src/arch/sparc/regfile.hh | |
| parent | ecde8844041e6baf7122f0dacaf8fba7cdc4f691 (diff) | |
| download | gem5-faa6ebebe1121170778d005b384a21ce6da10308.tar.xz | |
SPARC: Phase out SPARC's intregfile.hh.
Diffstat (limited to 'src/arch/sparc/regfile.hh')
| -rw-r--r-- | src/arch/sparc/regfile.hh | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh index c3c53a414..b468d568b 100644 --- a/src/arch/sparc/regfile.hh +++ b/src/arch/sparc/regfile.hh @@ -34,16 +34,20 @@ #include <string> -#include "arch/sparc/intregfile.hh" -#include "arch/sparc/isa_traits.hh" #include "arch/sparc/miscregfile.hh" -#include "arch/sparc/types.hh" +#include "arch/sparc/sparc_traits.hh" #include "base/types.hh" +#include "sim/serialize.hh" class Checkpoint; +class EventManager; +class ThreadContext; namespace SparcISA { + const int NumIntArchRegs = 32; + const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs; + class RegFile { protected: |