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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-06 05:46:44 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-06 05:46:44 -0500 |
| commit | bf5f6c64305682d3e53a2cfe82ff6980c16341f4 (patch) | |
| tree | 23c7cb642f9f8b458a38bed60286251ee0128f6b /src/arch/sparc/regfile.hh | |
| parent | 5ad1731a1226a57780c34dc576e5ebdf6e1729f7 (diff) | |
| download | gem5-bf5f6c64305682d3e53a2cfe82ff6980c16341f4.tar.xz | |
Some changes for misc regs which were changed into unofficial integer registers, and moved the flattenIndex function into the register file.
--HG--
extra : convert_revision : 6b797c793a6c12c61a23f0f78a1ea1c88609553e
Diffstat (limited to 'src/arch/sparc/regfile.hh')
| -rw-r--r-- | src/arch/sparc/regfile.hh | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh index 9f33435f6..51f1b5fef 100644 --- a/src/arch/sparc/regfile.hh +++ b/src/arch/sparc/regfile.hh @@ -120,6 +120,8 @@ namespace SparcISA void changeContext(RegContextParam param, RegContextVal val); }; + int flattenIntIndex(ThreadContext * tc, int reg); + void copyRegs(ThreadContext *src, ThreadContext *dest); void copyMiscRegs(ThreadContext *src, ThreadContext *dest); |