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| author | Korey Sewell <ksewell@umich.edu> | 2011-06-09 01:34:06 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2011-06-09 01:34:06 -0400 |
| commit | 1a451cd2c5ec20c27c39a1cd3e3b5422c2b4f679 (patch) | |
| tree | bcd4c037bb4f6822d5b1e3112ebca7060e3dbcae /src/arch/sparc/registers.hh | |
| parent | 67bb3070032fcb944a63aabb4ecfff692840e7bf (diff) | |
| download | gem5-1a451cd2c5ec20c27c39a1cd3e3b5422c2b4f679.tar.xz | |
sparc: compilation fixes for inorder
Add a few constants and functions that the InOrder model wants for SPARC.
* * *
sparc: add eaComp function
InOrder separates the address generation from the actual access so give
Sparc that functionality
* * *
sparc: add control flags for branches
branch predictors and other cpu model functions need to know specific information
about branches, so add the necessary flags here
Diffstat (limited to 'src/arch/sparc/registers.hh')
| -rw-r--r-- | src/arch/sparc/registers.hh | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/sparc/registers.hh b/src/arch/sparc/registers.hh index bb0f2bb89..f4305dc1a 100644 --- a/src/arch/sparc/registers.hh +++ b/src/arch/sparc/registers.hh @@ -77,6 +77,8 @@ const int SyscallPseudoReturnReg = 9; const int NumIntArchRegs = 32; const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs; +const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs; + } // namespace SparcISA #endif |