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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-05 01:55:02 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-05 01:55:02 -0500 |
| commit | 12c5bd2305a83c65d068686ec2d6588bde769805 (patch) | |
| tree | 4ec41b3570c2a0d137e18b2ca38318c4639599ae /src/arch/sparc/sparc_traits.hh | |
| parent | f2daf210f1cac2dd0a102b9d796fb700d4be92d1 (diff) | |
| download | gem5-12c5bd2305a83c65d068686ec2d6588bde769805.tar.xz | |
Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed.
src/arch/alpha/syscallreturn.hh:
src/arch/mips/syscallreturn.hh:
src/sim/syscallreturn.hh:
Move the SyscallReturn class into sim/syscallreturn.hh
src/arch/sparc/faults.cc:
src/arch/sparc/isa/operands.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
src/arch/sparc/process.cc:
src/arch/sparc/sparc_traits.hh:
Move some miscregs into the integer register file so they get renamed.
--HG--
extra : convert_revision : df5b94fa1e7fdca34816084e0a423d6fdf86c79b
Diffstat (limited to 'src/arch/sparc/sparc_traits.hh')
| -rw-r--r-- | src/arch/sparc/sparc_traits.hh | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/sparc/sparc_traits.hh b/src/arch/sparc/sparc_traits.hh index a3d29ea8a..d89ec1119 100644 --- a/src/arch/sparc/sparc_traits.hh +++ b/src/arch/sparc/sparc_traits.hh @@ -41,7 +41,8 @@ namespace SparcISA // Number of register windows, can legally be 3 to 32 const int NWindows = 8; - const int NumMicroIntRegs = 1; + //const int NumMicroIntRegs = 1; + const int NumMicroIntRegs = 8; // const int NumRegularIntRegs = MaxGL * 8 + NWindows * 16; // const int NumMicroIntRegs = 1; |