diff options
| author | Lisa Hsu <hsul@eecs.umich.edu> | 2007-01-11 09:48:15 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2007-01-11 09:48:15 -0500 |
| commit | 5c9cbdbb4597a3ba6908a41c1dc459c25626e514 (patch) | |
| tree | 1bc33a9661ecc1dd4538ee10183ef809488830f2 /src/arch/sparc/tlb.cc | |
| parent | 9f75c1c58f8352a8625f035c151ebcf6ce95b908 (diff) | |
| parent | 42535f5f53ad2515cd4b8e617e4a2322aecac547 (diff) | |
| download | gem5-5c9cbdbb4597a3ba6908a41c1dc459c25626e514.tar.xz | |
Merge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5
into zed.eecs.umich.edu:/z/hsul/work/sparc/m5
src/arch/sparc/ua2005.cc:
hand merge between ali and me.
--HG--
extra : convert_revision : 810d63fb484ab26fc30f8130ef32390ba149b267
Diffstat (limited to 'src/arch/sparc/tlb.cc')
| -rw-r--r-- | src/arch/sparc/tlb.cc | 34 |
1 files changed, 32 insertions, 2 deletions
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc index 40542a9a6..1cecb4ebb 100644 --- a/src/arch/sparc/tlb.cc +++ b/src/arch/sparc/tlb.cc @@ -625,13 +625,13 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) return new DataAccessException; } - } else if (hpriv) { + } /*else if (hpriv) {*/ if (asi == ASI_P) { ct = Primary; context = pri_context; goto continueDtbFlow; } - } + //} if (!implicit) { if (AsiIsLittle(asi)) @@ -933,6 +933,36 @@ DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt) mbits((uint64_t)-1ll,12+bits(tsbtemp,3,0), 4); pkt->set(data); break; + case ASI_IMMU_TSB_PS0_PTR_REG: + temp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_TAG_ACCESS); + if (bits(temp,12,0) == 0) { + tsbtemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_C0_TSB_PS0); + cnftemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_C0_CONFIG); + } else { + tsbtemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_CX_TSB_PS0); + cnftemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_CX_CONFIG); + } + data = mbits(tsbtemp,63,13); + data |= temp >> (9 + bits(cnftemp,2,0) * 3) & + mbits((uint64_t)-1ll,12+bits(tsbtemp,3,0), 4); + pkt->set(data); + break; + case ASI_IMMU_TSB_PS1_PTR_REG: + temp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_TAG_ACCESS); + if (bits(temp,12,0) == 0) { + tsbtemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_C0_TSB_PS1); + cnftemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_C0_CONFIG); + } else { + tsbtemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_CX_TSB_PS1); + cnftemp = tc->readMiscRegWithEffect(MISCREG_MMU_ITLB_CX_CONFIG); + } + data = mbits(tsbtemp,63,13); + if (bits(tsbtemp,12,12)) + data |= ULL(1) << (13+bits(tsbtemp,3,0)); + data |= temp >> (9 + bits(cnftemp,2,0) * 3) & + mbits((uint64_t)-1ll,12+bits(tsbtemp,3,0), 4); + pkt->set(data); + break; default: doMmuReadError: |