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authorAndreas Sandberg <andreas@sandberg.pp.se>2013-06-03 13:55:41 +0200
committerAndreas Sandberg <andreas@sandberg.pp.se>2013-06-03 13:55:41 +0200
commit7846f59d0dcb36c13e06a3ba8a4c461e646582b6 (patch)
tree32b0ebd81cabb265409ad09e42285d2615354bdb /src/arch/sparc/tlb.cc
parent63dae287035c9670c0622eefc9a19e0dc05c299f (diff)
downloadgem5-7846f59d0dcb36c13e06a3ba8a4c461e646582b6.tar.xz
arch: Create a method to finalize physical addresses
in the TLB Some architectures (currently only x86) require some fixing-up of physical addresses after a normal address translation. This is usually to remap devices such as the APIC, but could be used for other memory mapped devices as well. When running the CPU in a using hardware virtualization, we still need to do these address fix-ups before inserting the request into the memory system. This patch moves this patch allows that code to be used by such CPUs without doing full address translations.
Diffstat (limited to 'src/arch/sparc/tlb.cc')
-rw-r--r--src/arch/sparc/tlb.cc6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index 5d6dfe2c3..66e75a98a 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -848,6 +848,12 @@ TLB::translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode)
return NoFault;
}
+Fault
+TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const
+{
+ return NoFault;
+}
+
Cycles
TLB::doMmuRegRead(ThreadContext *tc, Packet *pkt)
{