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| author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:35 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:35 -0400 |
| commit | d5d4e47f76ec254b89c6b884f5fcbf340d4fed49 (patch) | |
| tree | c231e9bf93bab39ff1f4488e738c5089159f4c9b /src/arch/sparc/tlb.cc | |
| parent | 73cfab8b234c595e86413d4f7169bddc1a1184dd (diff) | |
| download | gem5-d5d4e47f76ec254b89c6b884f5fcbf340d4fed49.tar.xz | |
sparc: init. cache state in TLB
valgrind complains and its a potential source of instability, so go ahead
and set it to 0 to start
Diffstat (limited to 'src/arch/sparc/tlb.cc')
| -rw-r--r-- | src/arch/sparc/tlb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc index 00ec4e411..ddc37cf3b 100644 --- a/src/arch/sparc/tlb.cc +++ b/src/arch/sparc/tlb.cc @@ -50,7 +50,7 @@ namespace SparcISA { TLB::TLB(const Params *p) : BaseTLB(p), size(p->size), usedEntries(0), lastReplaced(0), - cacheValid(false) + cacheState(0), cacheValid(false) { // To make this work you'll have to change the hypervisor and OS if (size > 64) |