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author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-16 12:55:55 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-16 12:55:55 -0500 |
commit | 91b56d03fc380a044564c5cfc84501f2b2849e5b (patch) | |
tree | 6b7187dc980e0f3f19c0eb50139b831eeafee824 /src/arch/sparc/tlb.hh | |
parent | 4da37bcd1bc2c42ce5f297a58b4b4bffa4e8cd4f (diff) | |
parent | c9f18981f9283095548c37aea6e7b2db648b70b0 (diff) | |
download | gem5-91b56d03fc380a044564c5cfc84501f2b2849e5b.tar.xz |
Merge zizzer:/bk/newmem
into zower.eecs.umich.edu:/eecshome/m5/sparcfs
--HG--
extra : convert_revision : c8718b3df72b8c951c24742e8ce517a93bc23fe9
Diffstat (limited to 'src/arch/sparc/tlb.hh')
-rw-r--r-- | src/arch/sparc/tlb.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index f69b40ffb..a6e6a8bd3 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -115,7 +115,7 @@ class TLB : public SimObject void writeSfsr(ThreadContext *tc, int reg, bool write, ContextType ct, bool se, FaultTypes ft, int asi); - void TLB::clearUsedBits(); + void clearUsedBits(); void writeTagAccess(ThreadContext *tc, int reg, Addr va, int context); |