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author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:15:44 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:15:44 -0800 |
commit | 5605079b1f20bc7f6a4a80c8d1e4daabe7125270 (patch) | |
tree | 29dfa1685e3e257e3857ef7f9672778d43582440 /src/arch/sparc/tlb.hh | |
parent | a1aba01a02a8c1261120de83d8fbfd6624f0cb17 (diff) | |
download | gem5-5605079b1f20bc7f6a4a80c8d1e4daabe7125270.tar.xz |
ISA: Replace the translate functions in the TLBs with translateAtomic.
Diffstat (limited to 'src/arch/sparc/tlb.hh')
-rw-r--r-- | src/arch/sparc/tlb.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 504a40cbb..d563772e6 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -177,7 +177,7 @@ class ITB : public TLB cacheEntry = NULL; } - Fault translate(RequestPtr &req, ThreadContext *tc); + Fault translateAtomic(RequestPtr &req, ThreadContext *tc); private: void writeSfsr(bool write, ContextType ct, bool se, FaultTypes ft, int asi); @@ -199,7 +199,7 @@ class DTB : public TLB cacheEntry[1] = NULL; } - Fault translate(RequestPtr &req, ThreadContext *tc, bool write); + Fault translateAtomic(RequestPtr &req, ThreadContext *tc, bool write); #if FULL_SYSTEM Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); |