diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-08 22:21:27 -0700 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-08 22:21:27 -0700 |
commit | 7b5a96f06b530db35637aca6f9d0f7a2ddfa6e60 (patch) | |
tree | 4c212f665de2628eac6f84d389de7a79b6d0b933 /src/arch/sparc/tlb.hh | |
parent | 08043c777f1f05f5e14581950013461f328965be (diff) | |
download | gem5-7b5a96f06b530db35637aca6f9d0f7a2ddfa6e60.tar.xz |
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
Diffstat (limited to 'src/arch/sparc/tlb.hh')
-rw-r--r-- | src/arch/sparc/tlb.hh | 57 |
1 files changed, 11 insertions, 46 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 4fe532d4a..cba60a0ff 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -36,8 +36,7 @@ #include "base/misc.hh" #include "config/full_system.hh" #include "mem/request.hh" -#include "params/SparcDTB.hh" -#include "params/SparcITB.hh" +#include "params/SparcTLB.hh" #include "sim/faults.hh" #include "sim/tlb.hh" @@ -57,6 +56,8 @@ class TLB : public BaseTLB //TLB state protected: + // Only used when this is the data TLB. + uint64_t sfar; uint64_t c0_tsb_ps0; uint64_t c0_tsb_ps1; uint64_t c0_config; @@ -148,6 +149,9 @@ class TLB : public BaseTLB void writeTagAccess(Addr va, int context); + Fault translateInst(RequestPtr req, ThreadContext *tc); + Fault translateData(RequestPtr req, ThreadContext *tc, bool write); + public: typedef SparcTLBParams Params; TLB(const Params *p); @@ -159,52 +163,10 @@ class TLB : public BaseTLB void dumpAll(); - // Checkpointing - virtual void serialize(std::ostream &os); - virtual void unserialize(Checkpoint *cp, const std::string §ion); - - /** Give an entry id, read that tlb entries' tte */ - uint64_t TteRead(int entry); - -}; - -class ITB : public TLB -{ - public: - typedef SparcITBParams Params; - ITB(const Params *p) : TLB(p) - { - cacheEntry = NULL; - } - - Fault translateAtomic(RequestPtr req, ThreadContext *tc); - void translateTiming(RequestPtr req, ThreadContext *tc, - Translation *translation); - private: - void writeSfsr(bool write, ContextType ct, - bool se, FaultTypes ft, int asi); - TlbEntry *cacheEntry; - friend class DTB; -}; - -class DTB : public TLB -{ - //DTLB specific state - protected: - uint64_t sfar; - public: - typedef SparcDTBParams Params; - DTB(const Params *p) : TLB(p) - { - sfar = 0; - cacheEntry[0] = NULL; - cacheEntry[1] = NULL; - } - Fault translateAtomic(RequestPtr req, - ThreadContext *tc, bool write=false); + ThreadContext *tc, bool write=false, bool execute=false); void translateTiming(RequestPtr req, ThreadContext *tc, - Translation *translation, bool write=false); + Translation *translation, bool write=false, bool execute=false); #if FULL_SYSTEM Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); @@ -215,6 +177,9 @@ class DTB : public TLB virtual void serialize(std::ostream &os); virtual void unserialize(Checkpoint *cp, const std::string §ion); + /** Give an entry id, read that tlb entries' tte */ + uint64_t TteRead(int entry); + private: void writeSfsr(Addr a, bool write, ContextType ct, bool se, FaultTypes ft, int asi); |