diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-10 00:31:51 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-10 00:31:51 -0700 |
| commit | 8eec565d0ddeb6a788bc084180b223757fd9d05f (patch) | |
| tree | c97294ac68ae6ff9db4ba3c7acafd94d8aed5971 /src/arch/sparc/tlb.hh | |
| parent | 5bab52d56ddd482ae7eb1a6ae45d2a97fd457ca2 (diff) | |
| download | gem5-8eec565d0ddeb6a788bc084180b223757fd9d05f.tar.xz | |
SPARC: Turn on handleIprRead and handleIprWrite in SE in SPARC.
Diffstat (limited to 'src/arch/sparc/tlb.hh')
| -rw-r--r-- | src/arch/sparc/tlb.hh | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 76ef23b64..7d33f7044 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -167,10 +167,8 @@ class TLB : public BaseTLB Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode); void translateTiming(RequestPtr req, ThreadContext *tc, Translation *translation, Mode mode); -#if FULL_SYSTEM Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); -#endif void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs); // Checkpointing |