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author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-06-04 09:40:19 +0100 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-06-11 16:55:30 +0000 |
commit | f54020eb8155371725ab75b0fc5c419287eca084 (patch) | |
tree | 65d379f7603e689e083e9a58ff4c2e90abd19fbf /src/arch/sparc/tlb.hh | |
parent | 2113b21996d086dab32b9fd388efe3df241bfbd2 (diff) | |
download | gem5-f54020eb8155371725ab75b0fc5c419287eca084.tar.xz |
misc: Using smart pointers for memory Requests
This patch is changing the underlying type for RequestPtr from Request*
to shared_ptr<Request>. Having memory requests being managed by smart
pointers will simplify the code; it will also prevent memory leakage and
dangling pointers.
Change-Id: I7749af38a11ac8eb4d53d8df1252951e0890fde3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10996
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/arch/sparc/tlb.hh')
-rw-r--r-- | src/arch/sparc/tlb.hh | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 7437ec3e6..e5e6753be 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -146,8 +146,8 @@ class TLB : public BaseTLB void writeTagAccess(Addr va, int context); - Fault translateInst(RequestPtr req, ThreadContext *tc); - Fault translateData(RequestPtr req, ThreadContext *tc, bool write); + Fault translateInst(const RequestPtr &req, ThreadContext *tc); + Fault translateData(const RequestPtr &req, ThreadContext *tc, bool write); public: typedef SparcTLBParams Params; @@ -164,12 +164,13 @@ class TLB : public BaseTLB void dumpAll(); Fault translateAtomic( - RequestPtr req, ThreadContext *tc, Mode mode) override; + const RequestPtr &req, ThreadContext *tc, Mode mode) override; void translateTiming( - RequestPtr req, ThreadContext *tc, + const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode) override; Fault finalizePhysical( - RequestPtr req, ThreadContext *tc, Mode mode) const override; + const RequestPtr &req, + ThreadContext *tc, Mode mode) const override; Cycles doMmuRegRead(ThreadContext *tc, Packet *pkt); Cycles doMmuRegWrite(ThreadContext *tc, Packet *pkt); void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs); |