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author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-02 21:56:57 -0500 |
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committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-02 21:56:57 -0500 |
commit | c55a467a06eaa59c47c52a2adddc266b8e545589 (patch) | |
tree | e86f0c75e6009285507cd2414b829c122bb0be1f /src/arch/sparc/ua2005.cc | |
parent | f4bceb9760c93d3b5ff3c2606f7e460b42724670 (diff) | |
download | gem5-c55a467a06eaa59c47c52a2adddc266b8e545589.tar.xz |
make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.
Diffstat (limited to 'src/arch/sparc/ua2005.cc')
-rw-r--r-- | src/arch/sparc/ua2005.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index e1276b812..6961a24e9 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -257,11 +257,11 @@ MiscRegFile::readFSReg(int miscReg, ThreadContext * tc) temp = readRegNoEffect(miscReg) & (STS::active | STS::speculative); // Check that the CPU array is fully populated // (by calling getNumCPus()) - assert(sys->getNumCPUs() > tc->readCpuId()); + assert(sys->getNumCPUs() > tc->cpuId()); - temp |= tc->readCpuId() << STS::shft_id; + temp |= tc->cpuId() << STS::shft_id; - for (x = tc->readCpuId() & ~3; x < sys->threadContexts.size(); x++) { + for (x = tc->cpuId() & ~3; x < sys->threadContexts.size(); x++) { switch (sys->threadContexts[x]->status()) { case ThreadContext::Active: temp |= STS::st_run << (STS::shft_fsm0 - |