Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar.

src/arch/alpha/arguments.cc:
src/arch/alpha/arguments.hh:
src/arch/alpha/ev5.cc:
src/arch/alpha/faults.cc:
src/arch/alpha/faults.hh:
src/arch/alpha/freebsd/system.cc:
src/arch/alpha/freebsd/system.hh:
src/arch/alpha/isa/branch.isa:
src/arch/alpha/isa/decoder.isa:
src/arch/alpha/isa/main.isa:
src/arch/alpha/linux/process.cc:
src/arch/alpha/linux/system.cc:
src/arch/alpha/linux/system.hh:
src/arch/alpha/linux/threadinfo.hh:
src/arch/alpha/process.cc:
src/arch/alpha/regfile.hh:
src/arch/alpha/stacktrace.cc:
src/arch/alpha/stacktrace.hh:
src/arch/alpha/tlb.cc:
src/arch/alpha/tlb.hh:
src/arch/alpha/tru64/process.cc:
src/arch/alpha/tru64/system.cc:
src/arch/alpha/tru64/system.hh:
src/arch/alpha/utility.hh:
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/mips/faults.cc:
src/arch/mips/faults.hh:
src/arch/mips/isa_traits.cc:
src/arch/mips/isa_traits.hh:
src/arch/mips/linux/process.cc:
src/arch/mips/process.cc:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/arch/mips/regfile/regfile.hh:
src/arch/mips/stacktrace.hh:
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/linux/process.cc:
src/arch/sparc/linux/process.hh:
src/arch/sparc/process.cc:
src/arch/sparc/regfile.hh:
src/arch/sparc/solaris/process.cc:
src/arch/sparc/stacktrace.hh:
src/arch/sparc/ua2005.cc:
src/arch/sparc/utility.hh:
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
src/base/remote_gdb.cc:
src/base/remote_gdb.hh:
src/cpu/base.cc:
src/cpu/base.hh:
src/cpu/base_dyn_inst.hh:
src/cpu/checker/cpu.cc:
src/cpu/checker/cpu.hh:
src/cpu/checker/exec_context.hh:
src/cpu/cpu_exec_context.cc:
src/cpu/cpu_exec_context.hh:
src/cpu/cpuevent.cc:
src/cpu/cpuevent.hh:
src/cpu/exetrace.hh:
src/cpu/intr_control.cc:
src/cpu/memtest/memtest.hh:
src/cpu/o3/alpha_cpu.hh:
src/cpu/o3/alpha_cpu_impl.hh:
src/cpu/o3/alpha_dyn_inst_impl.hh:
src/cpu/o3/commit.hh:
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/regfile.hh:
src/cpu/o3/thread_state.hh:
src/cpu/ozone/back_end.hh:
src/cpu/ozone/cpu.hh:
src/cpu/ozone/cpu_impl.hh:
src/cpu/ozone/front_end.hh:
src/cpu/ozone/front_end_impl.hh:
src/cpu/ozone/inorder_back_end.hh:
src/cpu/ozone/lw_back_end.hh:
src/cpu/ozone/lw_back_end_impl.hh:
src/cpu/ozone/lw_lsq.hh:
src/cpu/ozone/lw_lsq_impl.hh:
src/cpu/ozone/thread_state.hh:
src/cpu/pc_event.cc:
src/cpu/pc_event.hh:
src/cpu/profile.cc:
src/cpu/profile.hh:
src/cpu/quiesce_event.cc:
src/cpu/quiesce_event.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
src/cpu/thread_state.hh:
src/dev/alpha_console.cc:
src/dev/ns_gige.cc:
src/dev/sinic.cc:
src/dev/tsunami_cchip.cc:
src/kern/kernel_stats.cc:
src/kern/kernel_stats.hh:
src/kern/linux/events.cc:
src/kern/linux/events.hh:
src/kern/system_events.cc:
src/kern/system_events.hh:
src/kern/tru64/dump_mbuf.cc:
src/kern/tru64/tru64.hh:
src/kern/tru64/tru64_events.cc:
src/kern/tru64/tru64_events.hh:
src/mem/vport.cc:
src/mem/vport.hh:
src/sim/faults.cc:
src/sim/faults.hh:
src/sim/process.cc:
src/sim/process.hh:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
src/sim/syscall_emul.cc:
src/sim/syscall_emul.hh:
src/sim/system.cc:
src/cpu/thread_context.hh:
src/sim/system.hh:
src/sim/vptr.hh:
    Change ExecContext to ThreadContext.

--HG--
rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh
extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e

1 files changed, 17 insertions, 17 deletions

diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 9f4805058..b89d48663 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -32,7 +32,7 @@
 
 Fault
 SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
-        ExecContext *xc)
+        ThreadContext *tc)
 {
     int64_t time;
     SparcSystem *sys;
@@ -47,25 +47,25 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
           setReg(miscReg, val);
           if (newLevel > oldLevel)
               ; // MUST DO SOMETHING HERE TO TELL CPU TO LOOK FOR INTERRUPTS XXX
-              //xc->getCpuPtr()->checkInterrupts = true;
+              //tc->getCpuPtr()->checkInterrupts = true;
           return NoFault;
 
         case MISCREG_SOFTINT_CLR:
-          return setRegWithEffect(miscReg, ~val & softint, xc);
+          return setRegWithEffect(miscReg, ~val & softint, tc);
         case MISCREG_SOFTINT_SET:
-          return setRegWithEffect(miscReg, val | softint, xc);
+          return setRegWithEffect(miscReg, val | softint, tc);
 
         case MISCREG_TICK_CMPR:
           if (isNonPriv())
               return new PrivilegedOpcode;
           if (tickCompare == NULL)
-              tickCompare = new TickCompareEvent(this, xc);
+              tickCompare = new TickCompareEvent(this, tc);
           setReg(miscReg, val);
           if (tick_cmprFields.int_dis && tickCompare.scheduled())
                   tickCompare.deschedule();
           time = tick_cmprFields.tick_cmpr - tickFields.counter;
           if (!tick_cmprFields.int_dis && time > 0)
-              tickCompare.schedule(time * xc->getCpuPtr()->cycles(1));
+              tickCompare.schedule(time * tc->getCpuPtr()->cycles(1));
           return NoFault;
 
         case MISCREG_STICK:
@@ -73,7 +73,7 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
               return new PrivilegedOpcode;
           if (isPriv())
               return new PrivilegedAction;
-          sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
+          sys = dynamic_cast<SparcSystem*>(tc->getSystemPtr());
           assert(sys != NULL);
           sys->sysTick = curTick/Clock::Int::ns - val & ~Bit64;
           stickFields.npt = val & Bit64 ? 1 : 0;
@@ -83,8 +83,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
           if (isNonPriv())
               return new PrivilegedOpcode;
           if (sTickCompare == NULL)
-              sTickCompare = new STickCompareEvent(this, xc);
-          sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
+              sTickCompare = new STickCompareEvent(this, tc);
+          sys = dynamic_cast<SparcSystem*>(tc->getSystemPtr());
           assert(sys != NULL);
           setReg(miscReg, val);
           if (stick_cmprFields.int_dis && sTickCompare.scheduled())
@@ -98,7 +98,7 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
         case MISCREG_PIL:
           if (FULL_SYSTEM) {
               setReg(miscReg, val);
-              //xc->getCpuPtr()->checkInterrupts;
+              //tc->getCpuPtr()->checkInterrupts;
                // MUST DO SOMETHING HERE TO TELL CPU TO LOOK FOR INTERRUPTS XXX
               return NoFault;
           } else
@@ -127,8 +127,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
           if (isNonPriv())
               return new PrivilegedOpcode;
           if (hSTickCompare == NULL)
-              hSTickCompare = new HSTickCompareEvent(this, xc);
-          sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
+              hSTickCompare = new HSTickCompareEvent(this, tc);
+          sys = dynamic_cast<SparcSystem*>(tc->getSystemPtr());
           assert(sys != NULL);
           setReg(miscReg, val);
           if (hstick_cmprFields.int_dis && hSTickCompare.scheduled())
@@ -143,7 +143,7 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
 }
 
 MiscReg
-MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ExecContext * xc)
+MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ThreadContext * tc)
 {
     switch (miscReg) {
 
@@ -166,7 +166,7 @@ MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ExecContext * xc)
               fault = new PrivilegedAction;
               return 0;
           }
-          sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
+          sys = dynamic_cast<SparcSystem*>(tc->getSystemPtr());
           assert(sys != NULL);
           return curTick/Clock::Int::ns - sys->sysTick | stickFields.npt << 63;
         case MISCREG_STICK_CMPR:
@@ -204,19 +204,19 @@ MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ExecContext * xc)
 }
 
 void
-MiscRegFile::processTickCompare(ExecContext *xc)
+MiscRegFile::processTickCompare(ThreadContext *tc)
 {
     panic("tick compare not implemented\n");
 }
 
 void
-MiscRegFile::processSTickCompare(ExecContext *xc)
+MiscRegFile::processSTickCompare(ThreadContext *tc)
 {
     panic("tick compare not implemented\n");
 }
 
 void
-MiscRegFile::processHSTickCompare(ExecContext *xc)
+MiscRegFile::processHSTickCompare(ThreadContext *tc)
 {
     panic("tick compare not implemented\n");
 }