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| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-09 22:20:38 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-09 22:20:38 -0500 |
| commit | 28a83c6d1c2673448aaedfb0eb131d6c6604badf (patch) | |
| tree | 43b2167594d62a10437c3e9119d2c071f525e93d /src/arch/sparc/ua2005.cc | |
| parent | 7933aade85a61ba745a9dd694b26b7420b7e649c (diff) | |
| download | gem5-28a83c6d1c2673448aaedfb0eb131d6c6604badf.tar.xz | |
quiet/remove some warnings
fix implementation of cwp manipulation
implement PS0 and PS1 IMMU asis
src/arch/sparc/miscregfile.cc:
get rid of some warnings
fix implementation of setting cwp to saturate cwp since it appears the os sets it to a large value to see how many there actually are
src/arch/sparc/tlb.cc:
implement PS0 and PS1 IMMU access ASIs
src/arch/sparc/ua2005.cc:
make warning less verbose
--HG--
extra : convert_revision : 442b65dfc41ebc32b2ef0e6b80da94eee3be9cd3
Diffstat (limited to 'src/arch/sparc/ua2005.cc')
| -rw-r--r-- | src/arch/sparc/ua2005.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index 1f7f65045..f03c4da57 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -47,7 +47,8 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val, // Check if we are going to interrupt because of something setReg(miscReg, val); tc->getCpuPtr()->checkInterrupts = true; - warn("Writing to softint not really supported, writing: %#x\n", val); + if (val != 0x10000 && val != 0) + warn("Writing to softint not really supported, writing: %#x\n", val); break; case MISCREG_SOFTINT_CLR: |