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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-08-14 19:25:07 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-08-14 19:25:07 -0400 |
| commit | 5bd07f98ed8b69e93345df4a7e626376fab57d8a (patch) | |
| tree | 676422af140c7e446eb7c96808698965a55683cf /src/arch/sparc/ua2005.cc | |
| parent | a04552ce86d0c4311d70abe78035bd8a52f1a14b (diff) | |
| download | gem5-5bd07f98ed8b69e93345df4a7e626376fab57d8a.tar.xz | |
Fix up doxygen.
--HG--
rename : docs/footer.html => src/doxygen/footer.html
rename : docs/stl.hh => src/doxygen/stl.hh
extra : convert_revision : 2b2e5637930843c1be07deaa708fd4126213cda2
Diffstat (limited to 'src/arch/sparc/ua2005.cc')
| -rw-r--r-- | src/arch/sparc/ua2005.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index b89d48663..6493ddfd5 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -37,7 +37,7 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val, int64_t time; SparcSystem *sys; switch (miscReg) { - /** Full system only ASRs */ + /* Full system only ASRs */ case MISCREG_SOFTINT: if (isNonPriv()) return new PrivilegedOpcode; @@ -94,7 +94,7 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val, sTickCompare.schedule(time * Clock::Int::ns); return NoFault; - /** Fullsystem only Priv registers. */ + /* Fullsystem only Priv registers. */ case MISCREG_PIL: if (FULL_SYSTEM) { setReg(miscReg, val); @@ -104,7 +104,7 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val, } else panic("PIL not implemented for syscall emulation\n"); - /** Hyper privileged registers */ + /* Hyper privileged registers */ case MISCREG_HPSTATE: case MISCREG_HINTP: setReg(miscReg, val); @@ -147,7 +147,7 @@ MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ThreadContext * tc) { switch (miscReg) { - /** Privileged registers. */ + /* Privileged registers. */ case MISCREG_SOFTINT: if (isNonPriv()) { fault = new PrivilegedOpcode; @@ -177,7 +177,7 @@ MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ThreadContext * tc) return readReg(miscReg); - /** Hyper privileged registers */ + /* Hyper privileged registers */ case MISCREG_HPSTATE: case MISCREG_HINTP: return readReg(miscReg); |