SPARC: Clean up some historical style issues.

1 files changed, 68 insertions, 42 deletions

diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc
index 6de44d8a3..c6616f43e 100644
--- a/src/arch/sparc/utility.cc
+++ b/src/arch/sparc/utility.cc
@@ -39,12 +39,12 @@
 namespace SparcISA {
 
 
-//The caller uses %o0-%05 for the first 6 arguments even if their floating
-//point. Double precision floating point values take two registers/args.
-//Quads, structs, and unions are passed as pointers. All arguments beyond
-//the sixth are passed on the stack past the 16 word window save area,
-//space for the struct/union return pointer, and space reserved for the
-//first 6 arguments which the caller may use but doesn't have to.
+// The caller uses %o0-%05 for the first 6 arguments even if their floating
+// point. Double precision floating point values take two registers/args.
+// Quads, structs, and unions are passed as pointers. All arguments beyond
+// the sixth are passed on the stack past the 16 word window save area,
+// space for the struct/union return pointer, and space reserved for the
+// first 6 arguments which the caller may use but doesn't have to.
 uint64_t
 getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
 {
@@ -72,15 +72,18 @@ copyMiscRegs(ThreadContext *src, ThreadContext *dest)
     uint8_t tl = src->readMiscRegNoEffect(MISCREG_TL);
 
     // Read all the trap level dependent registers and save them off
-    for(int i = 1; i <= MaxTL; i++)
-    {
+    for (int i = 1; i <= MaxTL; i++) {
         src->setMiscRegNoEffect(MISCREG_TL, i);
         dest->setMiscRegNoEffect(MISCREG_TL, i);
 
-        dest->setMiscRegNoEffect(MISCREG_TT, src->readMiscRegNoEffect(MISCREG_TT));
-        dest->setMiscRegNoEffect(MISCREG_TPC, src->readMiscRegNoEffect(MISCREG_TPC));
-        dest->setMiscRegNoEffect(MISCREG_TNPC, src->readMiscRegNoEffect(MISCREG_TNPC));
-        dest->setMiscRegNoEffect(MISCREG_TSTATE, src->readMiscRegNoEffect(MISCREG_TSTATE));
+        dest->setMiscRegNoEffect(MISCREG_TT,
+                src->readMiscRegNoEffect(MISCREG_TT));
+        dest->setMiscRegNoEffect(MISCREG_TPC,
+                src->readMiscRegNoEffect(MISCREG_TPC));
+        dest->setMiscRegNoEffect(MISCREG_TNPC,
+                src->readMiscRegNoEffect(MISCREG_TNPC));
+        dest->setMiscRegNoEffect(MISCREG_TSTATE,
+                src->readMiscRegNoEffect(MISCREG_TSTATE));
     }
 
     // Save off the traplevel
@@ -89,42 +92,65 @@ copyMiscRegs(ThreadContext *src, ThreadContext *dest)
 
 
     // ASRs
-//    dest->setMiscRegNoEffect(MISCREG_Y, src->readMiscRegNoEffect(MISCREG_Y));
-//    dest->setMiscRegNoEffect(MISCREG_CCR, src->readMiscRegNoEffect(MISCREG_CCR));
-    dest->setMiscRegNoEffect(MISCREG_ASI, src->readMiscRegNoEffect(MISCREG_ASI));
-    dest->setMiscRegNoEffect(MISCREG_TICK, src->readMiscRegNoEffect(MISCREG_TICK));
-    dest->setMiscRegNoEffect(MISCREG_FPRS, src->readMiscRegNoEffect(MISCREG_FPRS));
-    dest->setMiscRegNoEffect(MISCREG_SOFTINT, src->readMiscRegNoEffect(MISCREG_SOFTINT));
-    dest->setMiscRegNoEffect(MISCREG_TICK_CMPR, src->readMiscRegNoEffect(MISCREG_TICK_CMPR));
-    dest->setMiscRegNoEffect(MISCREG_STICK, src->readMiscRegNoEffect(MISCREG_STICK));
-    dest->setMiscRegNoEffect(MISCREG_STICK_CMPR, src->readMiscRegNoEffect(MISCREG_STICK_CMPR));
+//    dest->setMiscRegNoEffect(MISCREG_Y,
+//            src->readMiscRegNoEffect(MISCREG_Y));
+//    dest->setMiscRegNoEffect(MISCREG_CCR,
+//            src->readMiscRegNoEffect(MISCREG_CCR));
+    dest->setMiscRegNoEffect(MISCREG_ASI,
+            src->readMiscRegNoEffect(MISCREG_ASI));
+    dest->setMiscRegNoEffect(MISCREG_TICK,
+            src->readMiscRegNoEffect(MISCREG_TICK));
+    dest->setMiscRegNoEffect(MISCREG_FPRS,
+            src->readMiscRegNoEffect(MISCREG_FPRS));
+    dest->setMiscRegNoEffect(MISCREG_SOFTINT,
+            src->readMiscRegNoEffect(MISCREG_SOFTINT));
+    dest->setMiscRegNoEffect(MISCREG_TICK_CMPR,
+            src->readMiscRegNoEffect(MISCREG_TICK_CMPR));
+    dest->setMiscRegNoEffect(MISCREG_STICK,
+            src->readMiscRegNoEffect(MISCREG_STICK));
+    dest->setMiscRegNoEffect(MISCREG_STICK_CMPR,
+            src->readMiscRegNoEffect(MISCREG_STICK_CMPR));
 
     // Priv Registers
-    dest->setMiscRegNoEffect(MISCREG_TICK, src->readMiscRegNoEffect(MISCREG_TICK));
-    dest->setMiscRegNoEffect(MISCREG_TBA, src->readMiscRegNoEffect(MISCREG_TBA));
-    dest->setMiscRegNoEffect(MISCREG_PSTATE, src->readMiscRegNoEffect(MISCREG_PSTATE));
-    dest->setMiscRegNoEffect(MISCREG_PIL, src->readMiscRegNoEffect(MISCREG_PIL));
-    dest->setMiscReg(MISCREG_CWP, src->readMiscRegNoEffect(MISCREG_CWP));
-//    dest->setMiscRegNoEffect(MISCREG_CANSAVE, src->readMiscRegNoEffect(MISCREG_CANSAVE));
-//    dest->setMiscRegNoEffect(MISCREG_CANRESTORE, src->readMiscRegNoEffect(MISCREG_CANRESTORE));
-//    dest->setMiscRegNoEffect(MISCREG_OTHERWIN, src->readMiscRegNoEffect(MISCREG_OTHERWIN));
-//    dest->setMiscRegNoEffect(MISCREG_CLEANWIN, src->readMiscRegNoEffect(MISCREG_CLEANWIN));
-//    dest->setMiscRegNoEffect(MISCREG_WSTATE, src->readMiscRegNoEffect(MISCREG_WSTATE));
+    dest->setMiscRegNoEffect(MISCREG_TICK,
+            src->readMiscRegNoEffect(MISCREG_TICK));
+    dest->setMiscRegNoEffect(MISCREG_TBA,
+            src->readMiscRegNoEffect(MISCREG_TBA));
+    dest->setMiscRegNoEffect(MISCREG_PSTATE,
+            src->readMiscRegNoEffect(MISCREG_PSTATE));
+    dest->setMiscRegNoEffect(MISCREG_PIL,
+            src->readMiscRegNoEffect(MISCREG_PIL));
+    dest->setMiscReg(MISCREG_CWP,
+            src->readMiscRegNoEffect(MISCREG_CWP));
+//    dest->setMiscRegNoEffect(MISCREG_CANSAVE,
+//            src->readMiscRegNoEffect(MISCREG_CANSAVE));
+//    dest->setMiscRegNoEffect(MISCREG_CANRESTORE,
+//            src->readMiscRegNoEffect(MISCREG_CANRESTORE));
+//    dest->setMiscRegNoEffect(MISCREG_OTHERWIN,
+//            src->readMiscRegNoEffect(MISCREG_OTHERWIN));
+//    dest->setMiscRegNoEffect(MISCREG_CLEANWIN,
+//            src->readMiscRegNoEffect(MISCREG_CLEANWIN));
+//    dest->setMiscRegNoEffect(MISCREG_WSTATE,
+//            src->readMiscRegNoEffect(MISCREG_WSTATE));
     dest->setMiscReg(MISCREG_GL, src->readMiscRegNoEffect(MISCREG_GL));
 
     // Hyperprivilged registers
-    dest->setMiscRegNoEffect(MISCREG_HPSTATE, src->readMiscRegNoEffect(MISCREG_HPSTATE));
-    dest->setMiscRegNoEffect(MISCREG_HINTP, src->readMiscRegNoEffect(MISCREG_HINTP));
-    dest->setMiscRegNoEffect(MISCREG_HTBA, src->readMiscRegNoEffect(MISCREG_HTBA));
+    dest->setMiscRegNoEffect(MISCREG_HPSTATE,
+            src->readMiscRegNoEffect(MISCREG_HPSTATE));
+    dest->setMiscRegNoEffect(MISCREG_HINTP,
+            src->readMiscRegNoEffect(MISCREG_HINTP));
+    dest->setMiscRegNoEffect(MISCREG_HTBA,
+            src->readMiscRegNoEffect(MISCREG_HTBA));
     dest->setMiscRegNoEffect(MISCREG_STRAND_STS_REG,
             src->readMiscRegNoEffect(MISCREG_STRAND_STS_REG));
     dest->setMiscRegNoEffect(MISCREG_HSTICK_CMPR,
             src->readMiscRegNoEffect(MISCREG_HSTICK_CMPR));
 
     // FSR
-    dest->setMiscRegNoEffect(MISCREG_FSR, src->readMiscRegNoEffect(MISCREG_FSR));
+    dest->setMiscRegNoEffect(MISCREG_FSR,
+            src->readMiscRegNoEffect(MISCREG_FSR));
 
-    //Strand Status Register
+    // Strand Status Register
     dest->setMiscRegNoEffect(MISCREG_STRAND_STS_REG,
             src->readMiscRegNoEffect(MISCREG_STRAND_STS_REG));
 
@@ -178,10 +204,10 @@ copyMiscRegs(ThreadContext *src, ThreadContext *dest)
 void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {
-    //First loop through the integer registers.
+    // First loop through the integer registers.
     int old_gl = src->readMiscRegNoEffect(MISCREG_GL);
     int old_cwp = src->readMiscRegNoEffect(MISCREG_CWP);
-    //Globals
+    // Globals
     for (int x = 0; x < MaxGL; ++x) {
         src->setMiscReg(MISCREG_GL, x);
         dest->setMiscReg(MISCREG_GL, x);
@@ -189,18 +215,18 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
         for (int y = 1; y < 8; y++)
             dest->setIntReg(y, src->readIntReg(y));
     }
-    //Locals and ins. Outs are all also ins.
+    // Locals and ins. Outs are all also ins.
     for (int x = 0; x < NWindows; ++x) {
          src->setMiscReg(MISCREG_CWP, x);
          dest->setMiscReg(MISCREG_CWP, x);
          for (int y = 16; y < 32; y++)
              dest->setIntReg(y, src->readIntReg(y));
     }
-    //Microcode reg and pseudo int regs (misc regs in the integer regfile).
+    // Microcode reg and pseudo int regs (misc regs in the integer regfile).
     for (int y = NumIntArchRegs; y < NumIntArchRegs + NumMicroIntRegs; ++y)
         dest->setIntReg(y, src->readIntReg(y));
 
-    //Restore src's GL, CWP
+    // Restore src's GL, CWP
     src->setMiscReg(MISCREG_GL, old_gl);
     src->setMiscReg(MISCREG_CWP, old_cwp);
 
@@ -234,4 +260,4 @@ initCPU(ThreadContext *tc, int cpuId)
         por->invoke(tc);
 }
 
-} //namespace SPARC_ISA
+} // namespace SPARC_ISA