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authorGabe Black <gblack@eecs.umich.edu>2007-03-15 02:52:51 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-15 02:52:51 +0000
commit32368a2bd62409b303b0fcbe796fc94e4902657d (patch)
treeaf146159b4488dc9bf1c581162452a8de06a3d16 /src/arch/sparc/utility.hh
parentff90b8c1aa99711eeb55c5eba29519f77cbc041c (diff)
parenta2b56088fb4d12aee73ecfeaba88cfa46f98567e (diff)
downloadgem5-32368a2bd62409b303b0fcbe796fc94e4902657d.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 src/arch/mips/utility.hh: src/arch/x86/SConscript: Hand merge --HG-- extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
Diffstat (limited to 'src/arch/sparc/utility.hh')
-rw-r--r--src/arch/sparc/utility.hh16
1 files changed, 0 insertions, 16 deletions
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index dc9201401..1458231f2 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -48,22 +48,6 @@ namespace SparcISA
tc->readMiscRegNoEffect(MISCREG_HPSTATE & (1 << 2)));
}
- inline ExtMachInst
- makeExtMI(MachInst inst, ThreadContext * xc) {
- ExtMachInst emi = (MachInst) inst;
- //The I bit, bit 13, is used to figure out where the ASI
- //should come from. Use that in the ExtMachInst. This is
- //slightly redundant, but it removes the need to put a condition
- //into all the execute functions
- if(inst & (1 << 13))
- emi |= (static_cast<ExtMachInst>(xc->readMiscRegNoEffect(MISCREG_ASI))
- << (sizeof(MachInst) * 8));
- else
- emi |= (static_cast<ExtMachInst>(bits(inst, 12, 5))
- << (sizeof(MachInst) * 8));
- return emi;
- }
-
inline bool isCallerSaveIntegerRegister(unsigned int reg) {
panic("register classification not implemented");
return false;