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authorGabe Black <gblack@eecs.umich.edu>2007-03-09 18:32:13 -0500
committerGabe Black <gblack@eecs.umich.edu>2007-03-09 18:32:13 -0500
commitdf1ea2cf05e41c0be33eeb9f91c3adfb985005c2 (patch)
tree0c9c9001bcedaa8ae986bbc638a92d1465cc89a9 /src/arch/sparc/utility.hh
parentf1e3e1c3053866f63f3826126260f43bf0c7d0c7 (diff)
parentdc4d47bad4f95501ebd144dc4aa53aa17563abcc (diff)
downloadgem5-df1ea2cf05e41c0be33eeb9f91c3adfb985005c2.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace --HG-- extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
Diffstat (limited to 'src/arch/sparc/utility.hh')
-rw-r--r--src/arch/sparc/utility.hh15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 64b91695e..dc9201401 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -112,7 +112,20 @@ namespace SparcISA
inline void initCPU(ThreadContext *tc, int cpuId)
{
static Fault por = new PowerOnReset();
- por->invoke(tc);
+ if (cpuId == 0)
+ por->invoke(tc);
+
+ }
+
+ inline void startupCPU(ThreadContext *tc, int cpuId)
+ {
+#if FULL_SYSTEM
+ // Other CPUs will get activated by IPIs
+ if (cpuId == 0)
+ tc->activate(0);
+#else
+ tc->activate(0);
+#endif
}
} // namespace SparcISA