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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2011-01-03 14:35:43 -0800 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2011-01-03 14:35:43 -0800 |
commit | c69d48f007d2521fdbea52a0a7a95cfc4a547174 (patch) | |
tree | 59a866d2f48310090b5dd18dad0095029314cb6f /src/arch/sparc | |
parent | 1a10ccc5e551857fc3a7c049df99547ccfe3f72b (diff) | |
download | gem5-c69d48f007d2521fdbea52a0a7a95cfc4a547174.tar.xz |
Make commenting on close namespace brackets consistent.
Ran all the source files through 'perl -pi' with this script:
s|\s*(};?\s*)?/\*\s*(end\s*)?namespace\s*(\S+)\s*\*/(\s*})?|} // namespace $3|;
s|\s*};?\s*//\s*(end\s*)?namespace\s*(\S+)\s*|} // namespace $2\n|;
s|\s*};?\s*//\s*(\S+)\s*namespace\s*|} // namespace $1\n|;
Also did a little manual editing on some of the arch/*/isa_traits.hh files
and src/SConscript.
Diffstat (limited to 'src/arch/sparc')
-rw-r--r-- | src/arch/sparc/faults.hh | 2 | ||||
-rw-r--r-- | src/arch/sparc/kernel_stats.hh | 4 | ||||
-rw-r--r-- | src/arch/sparc/nativetrace.cc | 2 | ||||
-rw-r--r-- | src/arch/sparc/nativetrace.hh | 2 | ||||
-rw-r--r-- | src/arch/sparc/tlb.cc | 2 | ||||
-rw-r--r-- | src/arch/sparc/vtophys.cc | 2 |
6 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/sparc/faults.hh b/src/arch/sparc/faults.hh index e10e07494..bee29ee5e 100644 --- a/src/arch/sparc/faults.hh +++ b/src/arch/sparc/faults.hh @@ -302,6 +302,6 @@ genMachineCheckFault() } -} // SparcISA namespace +} // namespace SparcISA #endif // __SPARC_FAULTS_HH__ diff --git a/src/arch/sparc/kernel_stats.hh b/src/arch/sparc/kernel_stats.hh index c007c54c2..3d4c677a0 100644 --- a/src/arch/sparc/kernel_stats.hh +++ b/src/arch/sparc/kernel_stats.hh @@ -51,7 +51,7 @@ class Statistics : public ::Kernel::Statistics {} }; -} /* end namespace AlphaISA::Kernel */ -} /* end namespace AlphaISA */ +} // namespace AlphaISA::Kernel +} // namespace AlphaISA #endif // __ARCH_SPARC_KERNEL_STATS_HH__ diff --git a/src/arch/sparc/nativetrace.cc b/src/arch/sparc/nativetrace.cc index 5e3d5c8b3..7d8b96dc1 100644 --- a/src/arch/sparc/nativetrace.cc +++ b/src/arch/sparc/nativetrace.cc @@ -87,7 +87,7 @@ Trace::SparcNativeTrace::check(NativeTraceRecord *record) checkReg("ccr", regVal, realRegVal); } -} /* namespace Trace */ +} // namespace Trace //////////////////////////////////////////////////////////////////////// // diff --git a/src/arch/sparc/nativetrace.hh b/src/arch/sparc/nativetrace.hh index d618107bb..0bd40712b 100644 --- a/src/arch/sparc/nativetrace.hh +++ b/src/arch/sparc/nativetrace.hh @@ -47,6 +47,6 @@ class SparcNativeTrace : public NativeTrace void check(NativeTraceRecord *record); }; -} /* namespace Trace */ +} // namespace Trace #endif // __CPU_NATIVETRACE_HH__ diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc index 512878499..7c7819561 100644 --- a/src/arch/sparc/tlb.cc +++ b/src/arch/sparc/tlb.cc @@ -1408,7 +1408,7 @@ TLB::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(sfar); } -/* end namespace SparcISA */ } +} // namespace SparcISA SparcISA::TLB * SparcTLBParams::create() diff --git a/src/arch/sparc/vtophys.cc b/src/arch/sparc/vtophys.cc index 48e778c6f..36b2557e7 100644 --- a/src/arch/sparc/vtophys.cc +++ b/src/arch/sparc/vtophys.cc @@ -129,4 +129,4 @@ vtophys(ThreadContext *tc, Addr addr) return pte.translate(addr); } -} /* namespace SparcISA */ +} // namespace SparcISA |