Registers: Get rid of the float register width parameter.

5 files changed, 25 insertions, 187 deletions

diff --git a/src/arch/sparc/floatregfile.cc b/src/arch/sparc/floatregfile.cc
index 2d1af2218..6fdc36489 100644
--- a/src/arch/sparc/floatregfile.cc
+++ b/src/arch/sparc/floatregfile.cc
@@ -43,155 +43,38 @@ class Checkpoint;
 
 void FloatRegFile::clear()
 {
-    memset(regSpace, 0, sizeof(regSpace));
+    memset(regs.q, 0, sizeof(regs.q));
 }
 
-FloatReg FloatRegFile::readReg(int floatReg, int width)
+FloatReg FloatRegFile::readReg(int floatReg)
 {
-    //In each of these cases, we have to copy the value into a temporary
-    //variable. This is because we may otherwise try to access an
-    //unaligned portion of memory.
-    FloatReg result;
-    switch(width)
-    {
-      case SingleWidth:
-        uint32_t result32;
-        float32_t fresult32;
-        memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
-        result32 = htog(result32);
-        memcpy(&fresult32, &result32, sizeof(result32));
-        result = fresult32;
-        DPRINTF(FloatRegs, "Read FP32 register %d = [%f]0x%x\n",
-                floatReg, result, result32);
-        break;
-      case DoubleWidth:
-        uint64_t result64;
-        float64_t fresult64;
-        memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
-        result64 = htog(result64);
-        memcpy(&fresult64, &result64, sizeof(result64));
-        result = fresult64;
-        DPRINTF(FloatRegs, "Read FP64 register %d = [%f]0x%x\n",
-                floatReg, result, result64);
-        break;
-      case QuadWidth:
-        panic("Quad width FP not implemented.");
-        break;
-      default:
-        panic("Attempted to read a %d bit floating point register!", width);
-    }
-    return result;
+    return regs.s[floatReg];
 }
 
-FloatRegBits FloatRegFile::readRegBits(int floatReg, int width)
+FloatRegBits FloatRegFile::readRegBits(int floatReg)
 {
-    //In each of these cases, we have to copy the value into a temporary
-    //variable. This is because we may otherwise try to access an
-    //unaligned portion of memory.
-    FloatRegBits result;
-    switch(width)
-    {
-      case SingleWidth:
-        uint32_t result32;
-        memcpy(&result32, regSpace + 4 * floatReg, sizeof(result32));
-        result = htog(result32);
-        DPRINTF(FloatRegs, "Read FP32 bits register %d = 0x%x\n",
-                floatReg, result);
-        break;
-      case DoubleWidth:
-        uint64_t result64;
-        memcpy(&result64, regSpace + 4 * floatReg, sizeof(result64));
-        result = htog(result64);
-        DPRINTF(FloatRegs, "Read FP64 bits register %d = 0x%x\n",
-                floatReg, result);
-        break;
-      case QuadWidth:
-        panic("Quad width FP not implemented.");
-        break;
-      default:
-        panic("Attempted to read a %d bit floating point register!", width);
-    }
-    return result;
+    return regs.q[floatReg];
 }
 
-Fault FloatRegFile::setReg(int floatReg, const FloatReg &val, int width)
+Fault FloatRegFile::setReg(int floatReg, const FloatReg &val)
 {
-    //In each of these cases, we have to copy the value into a temporary
-    //variable. This is because we may otherwise try to access an
-    //unaligned portion of memory.
-
-    uint32_t result32;
-    uint64_t result64;
-    float32_t fresult32;
-    float64_t fresult64;
-    switch(width)
-    {
-      case SingleWidth:
-        fresult32 = val;
-        memcpy(&result32, &fresult32, sizeof(result32));
-        result32 = gtoh(result32);
-        memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
-        DPRINTF(FloatRegs, "Write FP64 register %d = 0x%x\n",
-                floatReg, result32);
-        break;
-      case DoubleWidth:
-        fresult64 = val;
-        memcpy(&result64, &fresult64, sizeof(result64));
-        result64 = gtoh(result64);
-        memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
-        DPRINTF(FloatRegs, "Write FP64 register %d = 0x%x\n",
-                floatReg, result64);
-        break;
-      case QuadWidth:
-        panic("Quad width FP not implemented.");
-        break;
-      default:
-        panic("Attempted to read a %d bit floating point register!", width);
-    }
+    regs.s[floatReg] = val;
     return NoFault;
 }
 
-Fault FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width)
+Fault FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val)
 {
-    //In each of these cases, we have to copy the value into a temporary
-    //variable. This is because we may otherwise try to access an
-    //unaligned portion of memory.
-    uint32_t result32;
-    uint64_t result64;
-    switch(width)
-    {
-      case SingleWidth:
-        result32 = gtoh((uint32_t)val);
-        memcpy(regSpace + 4 * floatReg, &result32, sizeof(result32));
-        DPRINTF(FloatRegs, "Write FP64 bits register %d = 0x%x\n",
-                floatReg, result32);
-        break;
-      case DoubleWidth:
-        result64 = gtoh((uint64_t)val);
-        memcpy(regSpace + 4 * floatReg, &result64, sizeof(result64));
-        DPRINTF(FloatRegs, "Write FP64 bits register %d = 0x%x\n",
-                floatReg, result64);
-        break;
-      case QuadWidth:
-        panic("Quad width FP not implemented.");
-        break;
-      default:
-        panic("Attempted to read a %d bit floating point register!", width);
-    }
+    regs.q[floatReg] = val;
     return NoFault;
 }
 
 void FloatRegFile::serialize(std::ostream &os)
 {
-    uint8_t *float_reg = (uint8_t*)regSpace;
-    SERIALIZE_ARRAY(float_reg,
-            SingleWidth / 8 * NumFloatRegs);
+    SERIALIZE_ARRAY(regs.q, NumFloatRegs);
 }
 
 void FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
 {
-    uint8_t *float_reg = (uint8_t*)regSpace;
-    UNSERIALIZE_ARRAY(float_reg,
-            SingleWidth / 8 * NumFloatRegs);
+    UNSERIALIZE_ARRAY(regs.q, NumFloatRegs);
 }
 
diff --git a/src/arch/sparc/floatregfile.hh b/src/arch/sparc/floatregfile.hh
index 265e71b4a..d1ac39842 100644
--- a/src/arch/sparc/floatregfile.hh
+++ b/src/arch/sparc/floatregfile.hh
@@ -45,37 +45,25 @@ namespace SparcISA
     const int NumFloatArchRegs = 64;
     const int NumFloatRegs = 64;
 
-    typedef float float32_t;
-    typedef double float64_t;
-    //FIXME long double refers to a 10 byte float, rather than a
-    //16 byte float as required. This data type may have to be emulated.
-    typedef double float128_t;
-
     class FloatRegFile
     {
-      public:
-        static const int SingleWidth = 32;
-        static const int DoubleWidth = 64;
-        static const int QuadWidth = 128;
-
       protected:
-
-        //Since the floating point registers overlap each other,
-        //A generic storage space is used. The float to be returned is
-        //pulled from the appropriate section of this region.
-        char regSpace[(SingleWidth / 8) * NumFloatRegs];
+        union {
+            uint32_t q[NumFloatRegs];
+            float s[NumFloatRegs];
+        } regs;
 
       public:
 
         void clear();
 
-        FloatReg readReg(int floatReg, int width);
+        FloatReg readReg(int floatReg);
 
-        FloatRegBits readRegBits(int floatReg, int width);
+        FloatRegBits readRegBits(int floatReg);
 
-        Fault setReg(int floatReg, const FloatReg &val, int width);
+        Fault setReg(int floatReg, const FloatReg &val);
 
-        Fault setRegBits(int floatReg, const FloatRegBits &val, int width);
+        Fault setRegBits(int floatReg, const FloatRegBits &val);
 
         void serialize(std::ostream &os);
 
diff --git a/src/arch/sparc/regfile.cc b/src/arch/sparc/regfile.cc
index 1daa43818..287516f9a 100644
--- a/src/arch/sparc/regfile.cc
+++ b/src/arch/sparc/regfile.cc
@@ -74,49 +74,24 @@ void RegFile::clear()
     intRegFile.clear();
 }
 
-FloatReg RegFile::readFloatReg(int floatReg, int width)
-{
-    return floatRegFile.readReg(floatReg, width);
-}
-
 FloatReg RegFile::readFloatReg(int floatReg)
 {
-    //Use the "natural" width of a single float
-    return floatRegFile.readReg(floatReg, FloatRegFile::SingleWidth);
-}
-
-FloatRegBits RegFile::readFloatRegBits(int floatReg, int width)
-{
-    return floatRegFile.readRegBits(floatReg, width);
+    return floatRegFile.readReg(floatReg);
 }
 
 FloatRegBits RegFile::readFloatRegBits(int floatReg)
 {
-    //Use the "natural" width of a single float
-    return floatRegFile.readRegBits(floatReg,
-            FloatRegFile::SingleWidth);
-}
-
-void RegFile::setFloatReg(int floatReg, const FloatReg &val, int width)
-{
-    floatRegFile.setReg(floatReg, val, width);
+    return floatRegFile.readRegBits(floatReg);
 }
 
 void RegFile::setFloatReg(int floatReg, const FloatReg &val)
 {
-    //Use the "natural" width of a single float
-    setFloatReg(floatReg, val, FloatRegFile::SingleWidth);
-}
-
-void RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
-{
-    floatRegFile.setRegBits(floatReg, val, width);
+    floatRegFile.setReg(floatReg, val);
 }
 
 void RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val)
 {
-    //Use the "natural" width of a single float
-    floatRegFile.setRegBits(floatReg, val, FloatRegFile::SingleWidth);
+    floatRegFile.setRegBits(floatReg, val);
 }
 
 IntReg RegFile::readIntReg(int intReg)
diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh
index 2333d9da5..a9d9be200 100644
--- a/src/arch/sparc/regfile.hh
+++ b/src/arch/sparc/regfile.hh
@@ -70,20 +70,12 @@ namespace SparcISA
 
         void clear();
 
-        FloatReg readFloatReg(int floatReg, int width);
-
         FloatReg readFloatReg(int floatReg);
 
-        FloatRegBits readFloatRegBits(int floatReg, int width);
-
         FloatRegBits readFloatRegBits(int floatReg);
 
-        void setFloatReg(int floatReg, const FloatReg &val, int width);
-
         void setFloatReg(int floatReg, const FloatReg &val);
 
-        void setFloatRegBits(int floatReg, const FloatRegBits &val, int width);
-
         void setFloatRegBits(int floatReg, const FloatRegBits &val);
 
         IntReg readIntReg(int intReg);
diff --git a/src/arch/sparc/types.hh b/src/arch/sparc/types.hh
index 501e2e8cb..c7ece9dfa 100644
--- a/src/arch/sparc/types.hh
+++ b/src/arch/sparc/types.hh
@@ -42,8 +42,8 @@ namespace SparcISA
     typedef uint64_t IntReg;
     typedef Twin64_t LargestRead;
     typedef uint64_t MiscReg;
-    typedef double FloatReg;
-    typedef uint64_t FloatRegBits;
+    typedef float FloatReg;
+    typedef uint32_t FloatRegBits;
     typedef union
     {
         IntReg intReg;