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authorGabe Black <gblack@eecs.umich.edu>2007-06-12 16:21:47 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-12 16:21:47 +0000
commita7f3bbcfab9d54387517c2a52e56bfefee092901 (patch)
tree18c3cd95448ba54673aa1e588e8eb50ab3cbc705 /src/arch/sparc
parent1493ceda8fe242776423e30f83db0774f6558ad4 (diff)
downloadgem5-a7f3bbcfab9d54387517c2a52e56bfefee092901.tar.xz
Make microOp vs microop and macroOp vs macroop capitilization consistent.
src/arch/x86/isa/macroop.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code. src/arch/x86/isa/microops/base.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation. --HG-- extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/isa/formats/mem/blockmem.isa20
-rw-r--r--src/arch/sparc/isa/formats/micro.isa24
2 files changed, 22 insertions, 22 deletions
diff --git a/src/arch/sparc/isa/formats/mem/blockmem.isa b/src/arch/sparc/isa/formats/mem/blockmem.isa
index e19016bd0..caf5bb8ce 100644
--- a/src/arch/sparc/isa/formats/mem/blockmem.isa
+++ b/src/arch/sparc/isa/formats/mem/blockmem.isa
@@ -248,14 +248,14 @@ def template BlockMemConstructor {{
: %(base_class)s("%(mnemonic)s", machInst)
{
%(constructor)s;
- microOps[0] = new %(class_name)s_0(machInst);
- microOps[1] = new %(class_name)s_1(machInst);
- microOps[2] = new %(class_name)s_2(machInst);
- microOps[3] = new %(class_name)s_3(machInst);
- microOps[4] = new %(class_name)s_4(machInst);
- microOps[5] = new %(class_name)s_5(machInst);
- microOps[6] = new %(class_name)s_6(machInst);
- microOps[7] = new %(class_name)s_7(machInst);
+ microops[0] = new %(class_name)s_0(machInst);
+ microops[1] = new %(class_name)s_1(machInst);
+ microops[2] = new %(class_name)s_2(machInst);
+ microops[3] = new %(class_name)s_3(machInst);
+ microops[4] = new %(class_name)s_4(machInst);
+ microops[5] = new %(class_name)s_5(machInst);
+ microops[6] = new %(class_name)s_6(machInst);
+ microops[7] = new %(class_name)s_7(machInst);
}
}};
@@ -289,9 +289,9 @@ let {{
for microPc in range(8):
flag_code = ''
if (microPc == 7):
- flag_code = "flags[IsLastMicroOp] = true;"
+ flag_code = "flags[IsLastMicroop] = true;"
elif (microPc == 0):
- flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroOp] = true;"
+ flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroop] = true;"
else:
flag_code = "flags[IsDelayedCommit] = true;"
pcedCode = matcher.sub("Frd_%d" % microPc, code)
diff --git a/src/arch/sparc/isa/formats/micro.isa b/src/arch/sparc/isa/formats/micro.isa
index da0f97d1b..c1d0c4f36 100644
--- a/src/arch/sparc/isa/formats/micro.isa
+++ b/src/arch/sparc/isa/formats/micro.isa
@@ -58,33 +58,33 @@ output header {{
class SparcMacroInst : public SparcStaticInst
{
protected:
- const uint32_t numMicroOps;
+ const uint32_t numMicroops;
//Constructor.
SparcMacroInst(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass, uint32_t _numMicroOps)
+ OpClass __opClass, uint32_t _numMicroops)
: SparcStaticInst(mnem, _machInst, __opClass),
- numMicroOps(_numMicroOps)
+ numMicroops(_numMicroops)
{
- assert(numMicroOps);
- microOps = new StaticInstPtr[numMicroOps];
- flags[IsMacroOp] = true;
+ assert(numMicroops);
+ microops = new StaticInstPtr[numMicroops];
+ flags[IsMacroop] = true;
}
~SparcMacroInst()
{
- delete [] microOps;
+ delete [] microops;
}
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;
- StaticInstPtr * microOps;
+ StaticInstPtr * microops;
- StaticInstPtr fetchMicroOp(MicroPC microPC)
+ StaticInstPtr fetchMicroop(MicroPC microPC)
{
- assert(microPC < numMicroOps);
- return microOps[microPC];
+ assert(microPC < numMicroops);
+ return microops[microPC];
}
%(MacroExecute)s
@@ -100,7 +100,7 @@ output header {{
ExtMachInst _machInst, OpClass __opClass)
: SparcStaticInst(mnem, _machInst, __opClass)
{
- flags[IsMicroOp] = true;
+ flags[IsMicroop] = true;
}
};