revert 5af8f40d8f2c

3 files changed, 1 insertions, 18 deletions

diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh
index 51e797c90..1d2a457d2 100644
--- a/src/arch/sparc/isa.hh
+++ b/src/arch/sparc/isa.hh
@@ -211,13 +211,6 @@ class ISA : public SimObject
         return reg;
     }
 
-    // dummy
-    int
-    flattenVectorIndex(int reg) const
-    {
-        return reg;
-    }
-
     int
     flattenMiscIndex(int reg) const
     {
diff --git a/src/arch/sparc/registers.hh b/src/arch/sparc/registers.hh
index a59139ba2..b25f34584 100644
--- a/src/arch/sparc/registers.hh
+++ b/src/arch/sparc/registers.hh
@@ -51,11 +51,6 @@ typedef uint32_t FloatRegBits;
 
 // dummy typedef since we don't have CC regs
 typedef uint8_t CCReg;
-// vector register file entry type
-typedef uint64_t VectorRegElement;
-const int NumVectorRegElements = 0;
-const int VectorRegBytes = NumVectorRegElements * sizeof(VectorRegElement);
-typedef std::array<VectorRegElement, NumVectorRegElements> VectorReg;
 
 typedef union
 {
@@ -80,7 +75,6 @@ const int SyscallPseudoReturnReg = 9;
 const int NumIntArchRegs = 32;
 const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
 const int NumCCRegs = 0;
-const int NumVectorRegs = 0;
 
 const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
 
@@ -88,8 +82,7 @@ const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
 enum DependenceTags {
     FP_Reg_Base = NumIntRegs,
     CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
-    Vector_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0
-    Misc_Reg_Base = Vector_Reg_Base + NumVectorRegs, // NumVectorRegs == 0
+    Misc_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0
     Max_Reg_Index = Misc_Reg_Base + NumMiscRegs,
 };
 
diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc
index 6d7a1ba95..34d4f79b3 100644
--- a/src/arch/sparc/utility.cc
+++ b/src/arch/sparc/utility.cc
@@ -237,9 +237,6 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
     // Would need to add condition-code regs if implemented
     assert(NumCCRegs == 0);
 
-    // Copy vector registers when vector registers put to use.
-    assert(NumVectorRegs == 0);
-
     // Copy misc. registers
     copyMiscRegs(src, dest);