CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU

Making the CheckerCPU a runtime time option requires the code to be compatible
with ISAs other than ARM.  This patch adds the appropriate function
stubs to allow compilation.

2 files changed, 11 insertions, 0 deletions

diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index a6179e0f8..37f1479b0 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -841,6 +841,13 @@ TLB::translateTiming(RequestPtr req, ThreadContext *tc,
     translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
 }
 
+Fault
+TLB::translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode)
+{
+    panic("Not implemented\n");
+    return NoFault;
+}
+
 Tick
 TLB::doMmuRegRead(ThreadContext *tc, Packet *pkt)
 {
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh
index cefa38175..89a049a8b 100644
--- a/src/arch/sparc/tlb.hh
+++ b/src/arch/sparc/tlb.hh
@@ -164,6 +164,10 @@ class TLB : public BaseTLB
     Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
     void translateTiming(RequestPtr req, ThreadContext *tc,
             Translation *translation, Mode mode);
+    /** Stub function for compilation support with CheckerCPU. SPARC ISA
+     *  does not support the Checker model at the moment
+     */
+    Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
     Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
     Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
     void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);