diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2015-10-12 04:07:59 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-10-12 04:07:59 -0400 |
| commit | 22c04190c607b9360d9a23548f8a54e83cf0e74a (patch) | |
| tree | 576135962e3c9c725157b461c8009b05933bba2b /src/arch/sparc | |
| parent | 735c4a87665119a33443cf8d191d329c66191c6e (diff) | |
| download | gem5-22c04190c607b9360d9a23548f8a54e83cf0e74a.tar.xz | |
misc: Remove redundant compiler-specific defines
This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap
(and similar) abstractions, as these are no longer needed with gcc 4.7
and clang 3.1 as minimum compiler versions.
Diffstat (limited to 'src/arch/sparc')
| -rw-r--r-- | src/arch/sparc/interrupts.hh | 4 | ||||
| -rw-r--r-- | src/arch/sparc/isa.hh | 4 | ||||
| -rw-r--r-- | src/arch/sparc/system.hh | 4 | ||||
| -rw-r--r-- | src/arch/sparc/tlb.hh | 4 |
4 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh index 432132f66..8929759f3 100644 --- a/src/arch/sparc/interrupts.hh +++ b/src/arch/sparc/interrupts.hh @@ -191,14 +191,14 @@ class Interrupts : public SimObject } void - serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE + serialize(CheckpointOut &cp) const override { SERIALIZE_ARRAY(interrupts,NumInterruptTypes); SERIALIZE_SCALAR(intStatus); } void - unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE + unserialize(CheckpointIn &cp) override { UNSERIALIZE_ARRAY(interrupts,NumInterruptTypes); UNSERIALIZE_SCALAR(intStatus); diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh index 1d2a457d2..18ac30857 100644 --- a/src/arch/sparc/isa.hh +++ b/src/arch/sparc/isa.hh @@ -167,8 +167,8 @@ class ISA : public SimObject void clear(); - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; void startup(ThreadContext *tc) {} diff --git a/src/arch/sparc/system.hh b/src/arch/sparc/system.hh index 68688cc1f..68a192cb9 100644 --- a/src/arch/sparc/system.hh +++ b/src/arch/sparc/system.hh @@ -54,8 +54,8 @@ class SparcSystem : public System * Serialization stuff */ public: - void serializeSymtab(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserializeSymtab(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serializeSymtab(CheckpointOut &cp) const override; + void unserializeSymtab(CheckpointIn &cp) override; /** reset binary symbol table */ SymbolTable *resetSymtab; diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index e64d3f1b4..cd4634ab8 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -176,8 +176,8 @@ class TLB : public BaseTLB void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs); // Checkpointing - void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE; - void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE; + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; /** Give an entry id, read that tlb entries' tte */ uint64_t TteRead(int entry); |