summaryrefslogtreecommitdiff
path: root/src/arch/sparc
diff options
context:
space:
mode:
authorMiles Kaufmann <milesck@eecs.umich.edu>2007-08-30 15:16:59 -0400
committerMiles Kaufmann <milesck@eecs.umich.edu>2007-08-30 15:16:59 -0400
commit54cc0053f0a6822e47a49771976af6daaabc24bb (patch)
tree72e6c7879de698347832e1e1475afbb9c1be2b70 /src/arch/sparc
parent9cb49ab9e0ff8917d20fd7dc81be3ce5ecc81bd8 (diff)
downloadgem5-54cc0053f0a6822e47a49771976af6daaabc24bb.tar.xz
params: Deprecate old-style constructors; update most SimObject constructors.
SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/tlb.cc10
-rw-r--r--src/arch/sparc/tlb.hh11
2 files changed, 12 insertions, 9 deletions
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index edc9d37a9..093e0356b 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -39,16 +39,14 @@
#include "cpu/base.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
-#include "params/SparcDTB.hh"
-#include "params/SparcITB.hh"
#include "sim/system.hh"
/* @todo remove some of the magic constants. -- ali
* */
namespace SparcISA {
-TLB::TLB(const std::string &name, int s)
- : SimObject(name), size(s), usedEntries(0), lastReplaced(0),
+TLB::TLB(const Params *p)
+ : SimObject(p), size(p->size), usedEntries(0), lastReplaced(0),
cacheValid(false)
{
// To make this work you'll have to change the hypervisor and OS
@@ -1437,11 +1435,11 @@ DTB::unserialize(Checkpoint *cp, const std::string &section)
SparcISA::ITB *
SparcITBParams::create()
{
- return new SparcISA::ITB(name, size);
+ return new SparcISA::ITB(this);
}
SparcISA::DTB *
SparcDTBParams::create()
{
- return new SparcISA::DTB(name, size);
+ return new SparcISA::DTB(this);
}
diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh
index d35a6e096..b38ee15dc 100644
--- a/src/arch/sparc/tlb.hh
+++ b/src/arch/sparc/tlb.hh
@@ -36,6 +36,8 @@
#include "base/misc.hh"
#include "config/full_system.hh"
#include "mem/request.hh"
+#include "params/SparcDTB.hh"
+#include "params/SparcITB.hh"
#include "sim/faults.hh"
#include "sim/sim_object.hh"
@@ -147,7 +149,8 @@ class TLB : public SimObject
void writeTagAccess(Addr va, int context);
public:
- TLB(const std::string &name, int size);
+ typedef SparcTLBParams Params;
+ TLB(const Params *p);
void dumpAll();
@@ -163,7 +166,8 @@ class TLB : public SimObject
class ITB : public TLB
{
public:
- ITB(const std::string &name, int size) : TLB(name, size)
+ typedef SparcITBParams Params;
+ ITB(const Params *p) : TLB(p)
{
cacheEntry = NULL;
}
@@ -182,7 +186,8 @@ class DTB : public TLB
protected:
uint64_t sfar;
public:
- DTB(const std::string &name, int size) : TLB(name, size)
+ typedef SparcDTBParams Params;
+ DTB(const Params *p) : TLB(p)
{
sfar = 0;
cacheEntry[0] = NULL;