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author | Gabe Black <gblack@eecs.umich.edu> | 2013-01-04 19:00:45 -0600 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2013-01-04 19:00:45 -0600 |
commit | e17c375ddd32fbbef55a96c446a4b98b20df2ad5 (patch) | |
tree | 42e917087dc0887f0aed3d74bad6196f27ab0d0c /src/arch/sparc | |
parent | d1965af22045d2a62b1cd1bc473b836413d79b46 (diff) | |
download | gem5-e17c375ddd32fbbef55a96c446a4b98b20df2ad5.tar.xz |
Decoder: Remove the thread context get/set from the decoder.
This interface is no longer used, and getting rid of it simplifies the
decoders and code that sets up the decoders. The thread context had been used
to read architectural state which was used to contextualize the instruction
memory as it came in. That was changed so that the state is now sent to the
decoders to keep locally if/when it changes. That's significantly more
efficient.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
Diffstat (limited to 'src/arch/sparc')
-rw-r--r-- | src/arch/sparc/decoder.hh | 18 | ||||
-rw-r--r-- | src/arch/sparc/isa.cc | 3 |
2 files changed, 3 insertions, 18 deletions
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh index f85d5e4de..e7a806d81 100644 --- a/src/arch/sparc/decoder.hh +++ b/src/arch/sparc/decoder.hh @@ -35,9 +35,6 @@ #include "arch/sparc/registers.hh" #include "arch/types.hh" #include "cpu/static_inst.hh" -#include "cpu/thread_context.hh" - -class ThreadContext; namespace SparcISA { @@ -45,28 +42,15 @@ namespace SparcISA class Decoder { protected: - ThreadContext * tc; // The extended machine instruction being generated ExtMachInst emi; bool instDone; MiscReg asi; public: - Decoder(ThreadContext * _tc) : tc(_tc), instDone(false), asi(0) + Decoder() : instDone(false), asi(0) {} - ThreadContext * - getTC() - { - return tc; - } - - void - setTC(ThreadContext * _tc) - { - tc = _tc; - } - void process() {} void diff --git a/src/arch/sparc/isa.cc b/src/arch/sparc/isa.cc index 4cfb93b0d..b8b4e88cc 100644 --- a/src/arch/sparc/isa.cc +++ b/src/arch/sparc/isa.cc @@ -29,6 +29,7 @@ */ #include "arch/sparc/asi.hh" +#include "arch/sparc/decoder.hh" #include "arch/sparc/isa.hh" #include "base/bitfield.hh" #include "base/trace.hh" @@ -550,7 +551,7 @@ ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc) switch (miscReg) { case MISCREG_ASI: - tc->getDecodePtr()->setContext(val); + tc->getDecoderPtr()->setContext(val); break; case MISCREG_STICK: case MISCREG_TICK: |