arch: teach ISA parser how to split code across files

This patch encompasses several interrelated and interdependent changes
to the ISA generation step.  The end goal is to reduce the size of the
generated compilation units for instruction execution and decoding so
that batch compilation can proceed with all CPUs active without
exhausting physical memory.

The ISA parser (src/arch/isa_parser.py) has been improved so that it can
accept 'split [output_type];' directives at the top level of the grammar
and 'split(output_type)' python calls within 'exec {{ ... }}' blocks.
This has the effect of "splitting" the files into smaller compilation
units.  I use air-quotes around "splitting" because the files themselves
are not split, but preprocessing directives are inserted to have the same
effect.

Architecturally, the ISA parser has had some changes in how it works.
In general, it emits code sooner.  It doesn't generate per-CPU files,
and instead defers to the C preprocessor to create the duplicate copies
for each CPU type.  Likewise there are more files emitted and the C
preprocessor does more substitution that used to be done by the ISA parser.

Finally, the build system (SCons) needs to be able to cope with a
dynamic list of source files coming out of the ISA parser. The changes
to the SCons{cript,truct} files support this. In broad strokes, the
targets requested on the command line are hidden from SCons until all
the build dependencies are determined, otherwise it would try, realize
it can't reach the goal, and terminate in failure. Since build steps
(i.e. running the ISA parser) must be taken to determine the file list,
several new build stages have been inserted at the very start of the
build. First, the build dependencies from the ISA parser will be emitted
to arch/$ISA/generated/inc.d, which is then read by a new SCons builder
to finalize the dependencies. (Once inc.d exists, the ISA parser will not
need to be run to complete this step.) Once the dependencies are known,
the 'Environments' are made by the makeEnv() function. This function used
to be called before the build began but now happens during the build.
It is easy to see that this step is quite slow; this is a known issue
and it's important to realize that it was already slow, but there was
no obvious cause to attribute it to since nothing was displayed to the
terminal. Since new steps that used to be performed serially are now in a
potentially-parallel build phase, the pathname handling in the SCons scripts
has been tightened up to deal with chdir() race conditions. In general,
pathnames are computed earlier and more likely to be stored, passed around,
and processed as absolute paths rather than relative paths.  In the end,
some of these issues had to be fixed by inserting serializing dependencies
in the build.

Minor note:
For the null ISA, we just provide a dummy inc.d so SCons is never
compelled to try to generate it. While it seems slightly wrong to have
anything in src/arch/*/generated (i.e. a non-generated 'generated' file),
it's by far the simplest solution.

12 files changed, 24 insertions, 29 deletions

diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript
index 28949aaaf..f05f30469 100644
--- a/src/arch/sparc/SConscript
+++ b/src/arch/sparc/SConscript
@@ -61,9 +61,4 @@ if env['TARGET_ISA'] == 'sparc':
     DebugFlag('Sparc', "Generic SPARC ISA stuff")
     DebugFlag('RegisterWindows', "Register window manipulation")
 
-    # Add in files generated by the ISA description.
-    isa_desc_files = env.ISADesc('isa/main.isa')
-    # Only non-header files need to be compiled.
-    for f in isa_desc_files:
-        if not f.path.endswith('.hh'):
-            Source(f)
+    env.ISADesc('isa/main.isa')
diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa
index 3ff1d22b0..3c95c2638 100644
--- a/src/arch/sparc/isa/base.isa
+++ b/src/arch/sparc/isa/base.isa
@@ -564,7 +564,7 @@ output exec {{
     /// @retval Full-system mode: NoFault if FP is enabled, FpDisabled
     /// if not.  Non-full-system mode: always returns NoFault.
     static inline Fault
-    checkFpEnableFault(%(CPU_exec_context)s *xc)
+    checkFpEnableFault(CPU_EXEC_CONTEXT *xc)
     {
         if (FullSystem) {
             PSTATE pstate = xc->readMiscReg(MISCREG_PSTATE);
diff --git a/src/arch/sparc/isa/formats/basic.isa b/src/arch/sparc/isa/formats/basic.isa
index feb99e140..7d70e8e60 100644
--- a/src/arch/sparc/isa/formats/basic.isa
+++ b/src/arch/sparc/isa/formats/basic.isa
@@ -113,7 +113,7 @@ def template BasicConstructorWithMnemonic {{
 // Basic instruction class execute method template.
 def template BasicExecute {{
         Fault
-        %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
@@ -132,7 +132,7 @@ def template BasicExecute {{
 
 def template DoFpOpExecute {{
         Fault
-        %(class_name)s::doFpOp(%(CPU_exec_context)s *xc,
+        %(class_name)s::doFpOp(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/branch.isa b/src/arch/sparc/isa/formats/branch.isa
index b34704f06..eb289931e 100644
--- a/src/arch/sparc/isa/formats/branch.isa
+++ b/src/arch/sparc/isa/formats/branch.isa
@@ -186,7 +186,7 @@ output decoder {{
 }};
 
 def template JumpExecute {{
-        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             // Attempt to execute the instruction
@@ -208,7 +208,7 @@ def template JumpExecute {{
 
 def template BranchExecute {{
         Fault
-        %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             // Attempt to execute the instruction
diff --git a/src/arch/sparc/isa/formats/integerop.isa b/src/arch/sparc/isa/formats/integerop.isa
index 58d7b37ee..355bbf393 100644
--- a/src/arch/sparc/isa/formats/integerop.isa
+++ b/src/arch/sparc/isa/formats/integerop.isa
@@ -237,7 +237,7 @@ output decoder {{
 }};
 
 def template IntOpExecute {{
-        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/mem/swap.isa b/src/arch/sparc/isa/formats/mem/swap.isa
index 17a490c4b..34dabc8cb 100644
--- a/src/arch/sparc/isa/formats/mem/swap.isa
+++ b/src/arch/sparc/isa/formats/mem/swap.isa
@@ -29,7 +29,7 @@
 
 // This template provides the execute functions for a swap
 def template SwapExecute {{
-        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
@@ -68,7 +68,7 @@ def template SwapExecute {{
 
 
 def template SwapInitiateAcc {{
-        Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
+        Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
                 Trace::InstRecord * traceData) const
         {
             Fault fault = NoFault;
@@ -97,7 +97,7 @@ def template SwapInitiateAcc {{
 
 
 def template SwapCompleteAcc {{
-        Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,
+        Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT * xc,
                 Trace::InstRecord * traceData) const
         {
             Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index ffce3063b..cf0a62ed9 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -130,7 +130,7 @@ output decoder {{
 
 // This template provides the execute functions for a load
 def template LoadExecute {{
-        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
@@ -158,7 +158,7 @@ def template LoadExecute {{
 }};
 
 def template LoadInitiateAcc {{
-        Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
+        Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
                 Trace::InstRecord * traceData) const
         {
             Fault fault = NoFault;
@@ -178,7 +178,7 @@ def template LoadInitiateAcc {{
 }};
 
 def template LoadCompleteAcc {{
-        Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,
+        Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT * xc,
                 Trace::InstRecord * traceData) const
         {
             Fault fault = NoFault;
@@ -195,7 +195,7 @@ def template LoadCompleteAcc {{
 
 // This template provides the execute functions for a store
 def template StoreExecute {{
-        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
@@ -226,7 +226,7 @@ def template StoreExecute {{
 }};
 
 def template StoreInitiateAcc {{
-        Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
+        Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
                 Trace::InstRecord * traceData) const
         {
             Fault fault = NoFault;
@@ -251,7 +251,7 @@ def template StoreInitiateAcc {{
 }};
 
 def template StoreCompleteAcc {{
-        Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc,
+        Fault %(class_name)s::completeAcc(PacketPtr, CPU_EXEC_CONTEXT * xc,
                 Trace::InstRecord * traceData) const
         {
             return NoFault;
@@ -260,7 +260,7 @@ def template StoreCompleteAcc {{
 
 def template EACompExecute {{
     Fault
-    %(class_name)s::eaComp(%(CPU_exec_context)s *xc,
+    %(class_name)s::eaComp(CPU_EXEC_CONTEXT *xc,
                                    Trace::InstRecord *traceData) const
     {
         Addr EA;
diff --git a/src/arch/sparc/isa/formats/nop.isa b/src/arch/sparc/isa/formats/nop.isa
index a1c650369..aab1f198d 100644
--- a/src/arch/sparc/isa/formats/nop.isa
+++ b/src/arch/sparc/isa/formats/nop.isa
@@ -79,7 +79,7 @@ output decoder {{
 }};
 
 def template NopExecute {{
-        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             // Nothing to see here, move along
diff --git a/src/arch/sparc/isa/formats/priv.isa b/src/arch/sparc/isa/formats/priv.isa
index c12a31b10..b52637f81 100644
--- a/src/arch/sparc/isa/formats/priv.isa
+++ b/src/arch/sparc/isa/formats/priv.isa
@@ -195,7 +195,7 @@ def template ControlRegConstructor {{
 }};
 
 def template PrivExecute {{
-    Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
+    Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
             Trace::InstRecord *traceData) const
     {
         %(op_decl)s;
diff --git a/src/arch/sparc/isa/formats/trap.isa b/src/arch/sparc/isa/formats/trap.isa
index 018379f57..bda7d5192 100644
--- a/src/arch/sparc/isa/formats/trap.isa
+++ b/src/arch/sparc/isa/formats/trap.isa
@@ -72,7 +72,7 @@ output decoder {{
 
 def template TrapExecute {{
         Fault
-        %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
@@ -85,7 +85,7 @@ def template TrapExecute {{
 
 def template FpUnimplExecute {{
         Fault
-        %(class_name)s::execute(%(CPU_exec_context)s *xc,
+        %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
diff --git a/src/arch/sparc/isa/formats/unimp.isa b/src/arch/sparc/isa/formats/unimp.isa
index 927bf9e64..bd87942ad 100644
--- a/src/arch/sparc/isa/formats/unimp.isa
+++ b/src/arch/sparc/isa/formats/unimp.isa
@@ -109,7 +109,7 @@ output decoder {{
 
 output exec {{
     Fault
-    FailUnimplemented::execute(%(CPU_exec_context)s *xc,
+    FailUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
                                Trace::InstRecord *traceData) const
     {
         panic("attempt to execute unimplemented instruction '%s' "
@@ -118,7 +118,7 @@ output exec {{
     }
 
     Fault
-    WarnUnimplemented::execute(%(CPU_exec_context)s *xc,
+    WarnUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
                                Trace::InstRecord *traceData) const
     {
         if (!warned) {
diff --git a/src/arch/sparc/isa/formats/unknown.isa b/src/arch/sparc/isa/formats/unknown.isa
index 8541d6a62..5b2db2b57 100644
--- a/src/arch/sparc/isa/formats/unknown.isa
+++ b/src/arch/sparc/isa/formats/unknown.isa
@@ -63,7 +63,7 @@ output decoder {{
 }};
 
 output exec {{
-        Fault Unknown::execute(%(CPU_exec_context)s *xc,
+        Fault Unknown::execute(CPU_EXEC_CONTEXT *xc,
                 Trace::InstRecord *traceData) const
         {
             return new IllegalInstruction;