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authorGabe Black <gabeblack@google.com>2017-12-22 16:14:03 -0800
committerGabe Black <gabeblack@google.com>2018-01-11 06:29:58 +0000
commit54a9d471faab2b4ab3ef26932957b2e0d496e84e (patch)
tree2fc64af43a35ca47cb2bc06461ff76f8092e1262 /src/arch/sparc
parentc2f3f6dbff9b29730da17269397f918742559179 (diff)
downloadgem5-54a9d471faab2b4ab3ef26932957b2e0d496e84e.tar.xz
arch,mem: Move page table construction into the arch classes.
This gets rid of an awkward NoArchPageTable class, and also gives the arch a place to inject ISA specific parameters (specifically page size) without having to have TheISA:: in the generic version of these types. Change-Id: I1412f303460d5c43dafdb9b3cd07af81c908a441 Reviewed-on: https://gem5-review.googlesource.com/6981 Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/process.cc7
-rw-r--r--src/arch/sparc/process.hh3
2 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index da7032f08..fe91589d0 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -42,6 +42,7 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_return.hh"
@@ -53,10 +54,12 @@ using namespace SparcISA;
static const int FirstArgumentReg = 8;
-SparcProcess::SparcProcess(ProcessParams * params, ObjectFile *objFile,
+SparcProcess::SparcProcess(ProcessParams *params, ObjectFile *objFile,
Addr _StackBias)
- : Process(params, objFile), StackBias(_StackBias)
+ : Process(params, new FuncPageTable(params->name, params->pid), objFile),
+ StackBias(_StackBias)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Initialize these to 0s
fillStart = 0;
spillStart = 0;
diff --git a/src/arch/sparc/process.hh b/src/arch/sparc/process.hh
index 6a203a400..d7e096758 100644
--- a/src/arch/sparc/process.hh
+++ b/src/arch/sparc/process.hh
@@ -160,7 +160,4 @@ class Sparc64Process : public SparcProcess
void setSyscallArg(ThreadContext *tc, int i, SparcISA::IntReg val);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __SPARC_PROCESS_HH__