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authorLisa Hsu <hsul@eecs.umich.edu>2007-01-26 12:51:07 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2007-01-26 12:51:07 -0500
commit202d7f62b9ea11e6b72c4b15ff818549ea14f038 (patch)
treef5f217121b907fe9cb78243dc35fcc12f17f596e /src/arch/sparc
parent01c959aeaf7f4c6e15bae9d8de227b6d2cbb7ae1 (diff)
downloadgem5-202d7f62b9ea11e6b72c4b15ff818549ea14f038.tar.xz
eliminate cpu checkInterrupts bool, it is redundant and unnecessary.
--HG-- extra : convert_revision : 58e960e5019f944c7ec5606e4b8c93ce42330719
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/ua2005.cc11
1 files changed, 1 insertions, 10 deletions
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 6220e6dec..b583da8b0 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -50,7 +50,6 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_SOFTINT_CLR:
return setRegWithEffect(MISCREG_SOFTINT, ~val & softint, tc);
case MISCREG_SOFTINT_SET:
- tc->getCpuPtr()->checkInterrupts = true;
tc->getCpuPtr()->post_interrupt(soft_interrupt);
return setRegWithEffect(MISCREG_SOFTINT, val | softint, tc);
@@ -80,15 +79,9 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
break;
case MISCREG_PSTATE:
- if (val & PSTATE::ie && !(pstate & PSTATE::ie)) {
- tc->getCpuPtr()->checkInterrupts = true;
- }
setReg(miscReg, val);
case MISCREG_PIL:
- if (val < pil) {
- tc->getCpuPtr()->checkInterrupts = true;
- }
setReg(miscReg, val);
break;
@@ -112,7 +105,7 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_QUEUE_NRES_ERROR_HEAD:
case MISCREG_QUEUE_NRES_ERROR_TAIL:
setReg(miscReg, val);
- tc->getCpuPtr()->checkInterrupts = true;
+ //do something to post mondo interrupt
break;
case MISCREG_HSTICK_CMPR:
@@ -208,7 +201,6 @@ MiscRegFile::processSTickCompare(ThreadContext *tc)
(stick_cmpr & mask(63)));
if (!(tc->readMiscReg(MISCREG_STICK_CMPR) & (ULL(1) << 63))) {
tc->getCpuPtr()->post_interrupt(soft_interrupt);
- tc->getCpuPtr()->checkInterrupts = true;
setRegWithEffect(MISCREG_SOFTINT, softint | (ULL(1) << 16), tc);
}
} else
@@ -232,7 +224,6 @@ MiscRegFile::processHSTickCompare(ThreadContext *tc)
if (!(tc->readMiscReg(MISCREG_HSTICK_CMPR) & (ULL(1) << 63))) {
setRegWithEffect(MISCREG_HINTP, 1, tc);
tc->getCpuPtr()->post_interrupt(hstick_match);
- tc->getCpuPtr()->checkInterrupts = true;
}
// Need to do something to cause interrupt to happen here !!! @todo
} else